MC68332ACEH20 Freescale Semiconductor, MC68332ACEH20 Datasheet - Page 39

IC MCU 32BIT 20MHZ 132-PQFP

MC68332ACEH20

Manufacturer Part Number
MC68332ACEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332ACEH20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, UART
Minimum Operating Temperature
- 40 C
Controller Family/series
68K
No. Of I/o's
15
Ram Memory Size
2KB
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Data Ram Size
2 KB
Number Of Programmable I/os
15
Number Of Timers
16
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
2KB
# I/os (max)
15
Number Of Timers - General Purpose
16
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MC68332ACEH20
0
3.7 System Reset
3.7.1 SIM Reset Mode Selection
MC68332
USER’S MANUAL
The following information is a concise reference only. MC68332 system reset is a com-
plex operation. To understand operation during and after reset, refer to SECTION 4
SYSTEM INTEGRATION MODULE, paragraph 4.6 Reset for more complete discus-
sion of the reset function.
The logic states of certain data bus pins during reset determine SIM operating config-
uration. In addition, the state of the MODCLK pin determines system clock source and
the state of the BKPT pin determines what happens during subsequent breakpoint as-
sertions. Table 3-6 is a summary of reset mode selection options.
Mode Select Pin
MODCLK
DATA11
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
BKPT
Freescale Semiconductor, Inc.
Table 3-6 SIM Reset Mode Selection
For More Information On This Product,
Go to: www.freescale.com
Background Mode Disabled
VCO = System Clock
DSACK0, DSACK1,
Test Mode Disabled
Default Function
CSBOOT 16-Bit
(Pin Left High)
AVEC, DS, AS,
OVERVIEW
MODCLK
CS[10:6]
IRQ[7:1]
SIZ[1:0]
CS[7:6]
CS[8:6]
CS[9:6]
CS0
CS1
CS2
CS3
CS4
CS5
CS6
Background Mode Enabled
EXTAL = System Clock
Alternate Function
Test Mode Enabled
(Pin Pulled Low)
CSBOOT 8-Bit
ADDR[20:19]
ADDR[21:19]
ADDR[22:19]
ADDR[23:19]
ADDR19
BGACK
PORTE
PORTF
FC0
FC1
FC2
BR
BG
3-15

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