SAK-C505CA-4EM CA Infineon Technologies, SAK-C505CA-4EM CA Datasheet - Page 29
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SAK-C505CA-4EM CA
Manufacturer Part Number
SAK-C505CA-4EM CA
Description
IC MCU 8BIT 32KB OTP MQFP-44-2
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet
1.SAK-C505CA-4EM_CA.pdf
(88 pages)
Specifications of SAK-C505CA-4EM CA
Core Processor
C500
Core Size
8-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-BQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
CAN, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-44
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
1.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
K505CA4EMCANP
K505CA4EMCAXT
SAK-C505CA-4EMCA
SAK-C505CA-4EMCAINTR
SAK-C505CA-4EMCATR
SAK-C505CA-4EMCATR
SAKC505CA4EMCAXT
SP000106397
K505CA4EMCAXT
SAK-C505CA-4EMCA
SAK-C505CA-4EMCAINTR
SAK-C505CA-4EMCATR
SAK-C505CA-4EMCATR
SAKC505CA4EMCAXT
SP000106397
Table 5
Contents of the CAN Registers in numeric order of their addresses
(C505C/C505CA only)
Addr.
n=1-F H
1)
F700 H
F701 H
F702 H
F704 H
F705 H
F706 H
F707 H
F708 H
F709 H
F70A H LGML0
F70B H LGML1
F70C H UMLM0
F70D H UMLM1
F70E H LMLM0
F70F H
F7n0 H
F7n1 H
F7n2 H
F7n3 H
F7n4 H
F7n5 H
Data Sheet
1) The notation “n“ (n= 1 to F) in the address definition defines the number of the related message object.
2) “X“ means that the value is undefined and the location is reserved. “U“ means that the value is unchanged
by a reset operation. “U“ values are undefined (as “X“) after a power-on reset operation
Register Content
CR
SR
IR
BTR0
BTR1
GMS0
GMS1
UGML0
UGML1
LMLM1
MCR0
MCR1
UAR0
UAR1
LAR0
LAR1
after
Reset
01 H
XX H
XX H
UU H
0UUU.
UUUU B
UU H
UUU1.
1111 B
UU H
UU H
UU H
UUUU.
U000 B
UU H
UU H
UU H
UUUU.
U000 B
UU H
UU H
UU H
UU H
UU H
UUUU.
U000 B
2)
Bit 7
TEST
BOFF
0
RMTPND
MSGVAL
SJW
ID20-18
ID20-18
ID20-18
Bit 6
CCE
EWRN –
Bit 5
0
TSEG2
25
ID4-0
ID4-0
ID4-0
TXRQ
TXIE
Bit 4
0
RXOK TXOK LEC2
1
ID28-21
ID28-21
ID20-13
ID28-21
ID28-21
ID12-5
ID12-5
ID12-5
C505/C505C/C505A/C505CA
INTID
Bit 3
EIE
1
CPUUPD
MSGLST
RXIE
BRP
ID17-13
ID17-13
Bit 2
SIE
1
0
0
0
TSEG1
Bit 1
IE
LEC1
1
0
0
0
NEWDAT
INTPND
Bit 0
INIT
LEC0
1
0
0
0
12.00