SAK-C505CA-4EM CA Infineon Technologies, SAK-C505CA-4EM CA Datasheet - Page 32
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SAK-C505CA-4EM CA
Manufacturer Part Number
SAK-C505CA-4EM CA
Description
IC MCU 8BIT 32KB OTP MQFP-44-2
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet
1.SAK-C505CA-4EM_CA.pdf
(88 pages)
Specifications of SAK-C505CA-4EM CA
Core Processor
C500
Core Size
8-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-BQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
CAN, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-44
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
1.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
K505CA4EMCANP
K505CA4EMCAXT
SAK-C505CA-4EMCA
SAK-C505CA-4EMCAINTR
SAK-C505CA-4EMCATR
SAK-C505CA-4EMCATR
SAKC505CA4EMCAXT
SP000106397
K505CA4EMCAXT
SAK-C505CA-4EMCA
SAK-C505CA-4EMCAINTR
SAK-C505CA-4EMCATR
SAK-C505CA-4EMCATR
SAKC505CA4EMCAXT
SP000106397
Timer / Counter 0 and 1
Timer/Counter 0 and 1 can be used in four operating modes as listed in
Table 6
Timer/Counter 0 and 1 Operating Modes
Mode
0
1
2
3
In the “timer” function (C/T = ‘0’) the register is incremented every machine cycle. Therefore the
count rate is
In the “counter” function the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a
falling edge the max. count rate is
programmed to function as a gate to facilitate pulse width measurements.
input clock logic.
Figure 10
Timer/Counter 0 and 1 Input Clock Logic
Data Sheet
Description
8-bit timer/counter with a
divide-by-32 prescaler
16-bit timer/counter
8-bit timer/counter with
8-bit autoreload
Timer/counter 0 used as one
8-bit timer/counter and one
8-bit timer
Timer 1 stops
f
OSC
P3.4/T0
P3.5/T1
Gate
(TMOD)
P3.2/INT0
P3.3/INT1
/6.
=1
OSC
f
OSC
/12. External inputs INT0 and INT1 (P3.2, P3.3) can be
M1
÷
<
_
0
0
1
1
6
1
TMOD
TR0
TR1
28
M0
0
1
0
1
C/T = 0
C/T = 1
&
f
C505/C505C/C505A/C505CA
internal
OSC
f
OSC
/6x32
Control
/6
Input Clock
Table 6
f
Timer 0/1
Input Clock
Figure 10
OSC
MCS03117
/6
external (max)
:
f
OSC
f
OSC
illustrates the
/12x32
/12
12.00