SAB-C505CA-4EM CA Infineon Technologies, SAB-C505CA-4EM CA Datasheet - Page 31
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SAB-C505CA-4EM CA
Manufacturer Part Number
SAB-C505CA-4EM CA
Description
IC MCU 8BIT OTP MQFP-44-2
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet
1.SAK-C505CA-4EM_CA.pdf
(88 pages)
Specifications of SAB-C505CA-4EM CA
Core Processor
C500
Core Size
8-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-BQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
CAN, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-44
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
1.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
B505CA4EMCANP
B505CA4EMCAXP
SAB-C505CA-4EMCA
SAB-C505CA-4EMCA
SAB-C505CA-4EMCAIN
SABC505CA4EMCAX
SP000106391
B505CA4EMCAXP
SAB-C505CA-4EMCA
SAB-C505CA-4EMCA
SAB-C505CA-4EMCAIN
SABC505CA4EMCAX
SP000106391
C505/C505C/C505A/C505CA
I/O Ports
The C505 has four 8-bit I/O ports and one 2-bit I/O port. Port 0 is an open-drain bidirectional I/O
port, while ports 1 to 4 are quasi-bidirectional I/O ports with internal pullup resistors. That means,
when configured as inputs, ports 1 to 4 will be pulled high and will source current when externally
pulled low. Port 0 will float when configured as input.
The output drivers of port 0 and 2 and the input buffers of port 0 are also used for accessing external
memory. In this application, port 0 outputs the low byte of the external memory address, time
multiplexed with the byte being written or read. Port 2 outputs the high byte of the external memory
address when the address is 16 bits wide. Otherwise, the port 2 pins continue emitting the P2 SFR
contents. In this function, port 0 is not an open-drain port, but uses a strong internal pullup FET .
Port 4 is 2-bit I/O port with CAN controller specific alternate functions. The eight analog input lines
are realized as mixed digital/analog inputs. The 8 analog inputs, AN0-AN7, are located at the port
1 pins P1.0 to P1.7. After reset, all analog inputs are disabled and the related pins of port 1 are
configured as digital inputs. The analog function of a specific port 1 pin is enabled by bits in the SFR
P1ANA. Writing a 0 to a bit position of P1ANA assigns the corresponding pin to operate as analog
input.
Note : P1ANA is a mapped SFR and can be only accessed if bit RMAP in SFR SYSCON is set.
Data Sheet
27
12.00