SAB-C505CA-4EM CA Infineon Technologies, SAB-C505CA-4EM CA Datasheet - Page 69
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SAB-C505CA-4EM CA
Manufacturer Part Number
SAB-C505CA-4EM CA
Description
IC MCU 8BIT OTP MQFP-44-2
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet
1.SAK-C505CA-4EM_CA.pdf
(88 pages)
Specifications of SAB-C505CA-4EM CA
Core Processor
C500
Core Size
8-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.25 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-BQFP
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
CAN, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
34
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-44
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
1.25 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
32.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
B505CA4EMCANP
B505CA4EMCAXP
SAB-C505CA-4EMCA
SAB-C505CA-4EMCA
SAB-C505CA-4EMCAIN
SABC505CA4EMCAX
SP000106391
B505CA4EMCAXP
SAB-C505CA-4EMCA
SAB-C505CA-4EMCA
SAB-C505CA-4EMCAIN
SABC505CA4EMCAX
SP000106391
Note:
1) V
2) During the sample time the input capacitance C
3) This parameter includes the sample time t
4) T
5) During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
6) Not 100% tested, but guaranteed by design characterization.
Data Sheet
these cases will be 00
internal resistance of the analog source must allow the capacitance to reach their final voltage level within t
After the end of the sample time t
conversion clock t
guaranteed by design characterization for all other voltages within the defined voltage range.
If an overload condition occurs on maximum 2 unused analog input pins and the absolute sum of input overload
currents on all analog input pins does not exceed 10 mA, an additional conversion error of 1/2 LSB is
permissible.
resistance of the reference source must allow the capacitance to reach their final voltage level within the
indicated time. The maximum internal resistance results from the programmed conversion timing.
UE
AIN
(max.) is tested at –40
may exeed V
ADC
AGND
H
depend on programming and can be taken from the table on the previous page.
or FF
or V
H
AREF
, respectively.
S
T
A
, changes of the analog input voltage have no effect on the conversion result.
up to the absolute maximum ratings. However, the conversion result in
=125 C ;
S
, the time for determining the digital result. Values for the
V
AIN
DD
65
must be charged/discharged by the external source. The
5.5 V; V
AREF
C505/C505C/C505A/C505CA
V
DD
+ 0.1 V and V
SS
=
V
AGND
12.00
. It is
S
.