SAK-C164CI-8E25M DB Infineon Technologies, SAK-C164CI-8E25M DB Datasheet - Page 5
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SAK-C164CI-8E25M DB
Manufacturer Part Number
SAK-C164CI-8E25M DB
Description
IC MCU 16BIT 64KB OTP MQFP-80-1
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C164CI-8EM_CB.pdf
(79 pages)
Specifications of SAK-C164CI-8E25M DB
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
59
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
80-SQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
ASC, CAN, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
59
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Packages
PG-MQFP-80
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
Can Nodes
1
A / D Input Lines (incl. Fadc)
8
Program Memory
64.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
K164CI8E25MDBNP
K164CI8E25MDBXP
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDBIN
SAKC164CI8E25MDBX
SP000104057
K164CI8E25MDBXP
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDB
SAK-C164CI-8E25MDBIN
SAKC164CI8E25MDBX
SP000104057
16-Bit Single-Chip Microcontroller
C166 Family
C164CI/SI, C164CL/SL
• High Performance 16-bit CPU with 4-Stage Pipeline
• 16-Priority-Level Interrupt System with 32 Sources, Sample-Rate down to 40 ns
• 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
• Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5),
• On-Chip Memory Modules
• On-Chip Peripheral Modules
• Up to 4 MBytes External Address Space for Code and Data
• Idle, Sleep, and Power Down Modes with Flexible Power Management
• Programmable Watchdog Timer and Oscillator Watchdog
• Up to 59 General Purpose I/O Lines,
Data Sheet
– 80 ns Instruction Cycle Time at 25 MHz CPU Clock
– 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit)
– Enhanced Boolean Bit Manipulation Facilities
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Single-Cycle Context Switching Support
– 16 MBytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area
Peripheral Event Controller (PEC)
via prescaler or via direct clock input
– 2 KBytes On-Chip Internal RAM (IRAM)
– 2 KBytes On-Chip Extension RAM (XRAM)
– up to 64 KBytes On-Chip Program Mask ROM or OTP Memory
– 8-Channel 10-bit A/D Converter with Programmable Conversion Time
– 8-Channel General Purpose Capture/Compare Unit (CAPCOM2)
– Capture/Compare Unit for flexible PWM Signal Generation (CAPCOM6)
– Multi-Functional General Purpose Timer Unit with 3 Timers
– Two Serial Channels (Synchronous/Asynchronous and High-Speed-Synchronous)
– On-Chip CAN Interface (Rev. 2.0B active) with 15 Message Objects
– On-Chip Real Time Clock
– Programmable External Bus Characteristics for Different Address Ranges
– Multiplexed or Demultiplexed External Address/Data Buses with 8-Bit or 16-Bit
– Four Optional Programmable Chip-Select Signals
partly with Selectable Input Thresholds and Hysteresis
down to 7.8 µs
(3/6 Capture/Compare Channels and 1 Compare Channel)
(Full CAN/Basic CAN)
Data Bus Width
1
V2.0, 2001-05
C164CI