PIC12F675-I/MF Microchip Technology, PIC12F675-I/MF Datasheet - Page 22
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PIC12F675-I/MF
Manufacturer Part Number
PIC12F675-I/MF
Description
IC MCU CMOS 1K FLASH W/AD 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
4.PIC12F675-IMD.pdf
(128 pages)
Specifications of PIC12F675-I/MF
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
128Byte
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 53270-913
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F675-I/MF
Manufacturer:
MICROCHIP
Quantity:
875
Part Number:
PIC12F675-I/MF
Manufacturer:
MICROCHI
Quantity:
20 000
PIC12F629/675
REGISTER 3-2:
REGISTER 3-3:
DS41190G-page 22
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2-0
Note 1:
Note:
U-0
U-0
—
—
2:
Global GPPU must be enabled for individual pull-ups to be enabled.
The weak pull-up device is automatically disabled if the pin is in Output mode (TRISIO = 0).
TRISIO<3> always reads ‘1’.
Unimplemented: Read as ‘0’
TRISIO<5:0>: General Purpose I/O Tri-State Control bit
1 = GPIO pin configured as an input (tri-stated)
0 = GPIO pin configured as an output
Unimplemented: Read as ‘0’
WPU<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
WPU<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
U-0
U-0
—
—
TRISIO: GPIO TRI-STATE REGISTER (ADDRESS: 85h)
WPU: WEAK PULL-UP REGISTER (ADDRESS: 95h)
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
TRISIO5
WPU5
R/W-1
R/W-1
TRISIO4
R/W-1
R/W-1
WPU4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRISIO3
R-1
U-0
—
TRISIO2
R/W-1
R/W-1
WPU2
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
TRISIO1
WPU1
R/W-1
R/W-1
TRISIO0
R/W-1
R/W-1
WPU0
bit 0
bit 0