PIC16LC77-04I/L Microchip Technology, PIC16LC77-04I/L Datasheet - Page 280
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PIC16LC77-04I/L
Manufacturer Part Number
PIC16LC77-04I/L
Description
IC MCU OTP 8KX14 A/D PWM 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC77-04I/L
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC77-04I/L
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC16LC77-04I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16C7X
LIST OF FIGURES
Figure 3-1:
Figure 3-2:
Figure 3-3:
Figure 3-4:
Figure 4-1:
Figure 4-2:
Figure 4-3:
Figure 4-4:
Figure 4-5:
Figure 4-6:
Figure 4-7:
Figure 4-8:
Figure 4-9:
Figure 4-10:
Figure 4-11:
Figure 4-12:
Figure 4-13:
Figure 4-14:
Figure 4-15:
Figure 4-16:
Figure 4-17:
Figure 4-18:
Figure 5-1:
Figure 5-2:
Figure 5-3:
Figure 5-4:
Figure 5-5:
Figure 5-6:
Figure 5-7:
Figure 5-8:
Figure 5-9:
Figure 5-10:
Figure 5-11:
Figure 5-12:
Figure 5-13:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
Figure 7-6:
DS30390E-page 280
PIC16C72 Block Diagram ......................... 10
PIC16C73/73A/76 Block Diagram............. 11
PIC16C74/74A/77 Block Diagram............. 12
Clock/Instruction Cycle.............................. 17
PIC16C72 Program Memory Map
and Stack .................................................. 19
PIC16C73/73A/74/74A Program
Memory Map and Stack ............................ 19
PIC16C76/77 Program Memory
Map and Stack .......................................... 20
PIC16C72 Register File Map .................... 21
PIC16C73/73A/74/74A Register
File Map .................................................... 21
PIC16C76/77 Register File Map ............... 22
Status Register (Address 03h,
OPTION Register (Address 81h,
181h) ......................................................... 31
INTCON Register
(Address 0Bh, 8Bh, 10bh, 18bh)............... 32
PIE1 Register PIC16C72
(Address 8Ch) ........................................... 33
PIE1 Register PIC16C73/73A/
74/74A/76/77 (Address 8Ch)..................... 34
PIR1 Register PIC16C72
(Address 0Ch) ........................................... 35
PIR1 Register PIC16C73/73A/
74/74A/76/77 (Address 0Ch)..................... 36
PIE2 Register (Address 8Dh).................... 37
PIR2 Register (Address 0Dh).................... 38
PCON Register (Address 8Eh) ................. 39
Loading of PC In Different
Situations .................................................. 40
Direct/Indirect Addressing ......................... 41
Block Diagram of RA3:RA0
and RA5 Pins ............................................ 43
Block Diagram of RA4/T0CKI Pin ............. 43
Block Diagram of RB3:RB0 Pins............... 45
Block Diagram of RB7:RB4 Pins
(PIC16C73/74) .......................................... 46
Block Diagram of
RB7:RB4 Pins (PIC16C72/73A/
74A/76/77)................................................. 46
PORTC Block Diagram
PORTD Block Diagram
PORTE Block Diagram
TRISE Register (Address 89h).................. 51
Successive I/O Operation ......................... 53
PORTD and PORTE Block Diagram
(Parallel Slave Port) .................................. 54
Parallel Slave Port Write Waveforms ........ 55
Parallel Slave Port Read Waveforms........ 55
Timer0 Block Diagram............................... 59
Timer0 Timing: Internal Clock/No
Prescale .................................................... 59
Timer0 Timing: Internal
Clock/Prescale 1:2 .................................... 60
Timer0 Interrupt Timing............................. 60
Timer0 Timing with External Clock............ 61
Block Diagram of the Timer0/WDT
Prescaler ................................................... 62
83h, 103h, 183h) ...................................... 30
(Peripheral Output Override).................... 48
(in I/O Port Mode)..................................... 50
(in I/O Port Mode)..................................... 51
Figure 8-1:
Figure 8-2:
Figure 9-1:
Figure 9-2:
Figure 10-1:
Figure 10-2:
Figure 10-3:
Figure 10-4:
Figure 10-5:
Figure 11-1:
Figure 11-2:
Figure 11-3:
Figure 11-4:
Figure 11-5:
Figure 11-6:
Figure 11-7:
Figure 11-8:
Figure 11-9:
Figure 11-10:
Figure 11-11:
Figure 11-12:
Figure 11-13:
Figure 11-14:
Figure 11-15:
Figure 11-16:
Figure 11-17:
Figure 11-18:
Figure 11-19:
Figure 11-20:
Figure 11-21:
Figure 11-22:
Figure 11-23:
Figure 11-24:
Figure 11-25:
Figure 11-26:
Figure 11-27:
Figure 12-1:
Figure 12-2:
Figure 12-3:
Figure 12-4:
T1CON: Timer1 Control Register
Timer1 Block Diagram .............................. 66
Timer2 Block Diagram .............................. 69
T2CON: Timer2 Control Register
CCP1CON Register (Address 17h)/
CCP2CON Register (Address 1Dh).......... 72
Capture Mode Operation
Block Diagram .......................................... 72
Compare Mode Operation
Block Diagram .......................................... 73
Simplified PWM Block Diagram ................ 74
PWM Output ............................................. 74
SSPSTAT: Sync Serial Port Status
Register (Address 94h)............................. 78
SSPCON: Sync Serial Port Control
Register (Address 14h)............................. 79
SSP Block Diagram (SPI Mode) ............... 80
SPI Master/Slave Connection................... 81
SPI Mode Timing, Master Mode
or Slave Mode w/o SS Control.................. 82
SPI Mode Timing, Slave Mode with
SS Control ................................................ 82
SSPSTAT: Sync Serial Port Status
Register (Address 94h)(PIC16C76/77)..... 83
SSPCON: Sync Serial Port Control
Register (Address 14h)(PIC16C76/77)..... 84
SSP Block Diagram (SPI Mode)
(PIC16C76/77).......................................... 85
SPI Master/Slave Connection
PIC16C76/77) ........................................... 86
SPI Mode Timing, Master Mode
SPI Mode Timing (Slave Mode
SPI Mode Timing (Slave Mode
With CKE = 1) (PIC16C76/77) .................. 88
Start and Stop Conditions......................... 89
7-bit Address Format ................................ 90
I
Slave-receiver Acknowledge .................... 90
Data Transfer Wait State .......................... 90
Master-transmitter Sequence ................... 91
Master-receiver Sequence........................ 91
Combined Format ..................................... 91
Multi-master Arbitration
(Two Masters)........................................... 92
Clock Synchronization .............................. 92
SSP Block Diagram
(I
(7-bit Address) .......................................... 95
I
(7-bit Address) .......................................... 96
Operation of the I
IDLE_MODE, RCV_MODE or
XMIT_MODE ............................................ 98
TXSTA: Transmit Status and
Control Register (Address 98h) ................ 99
RCSTA: Receive Status and
Control Register (Address 18h) .............. 100
RX Pin Sampling Scheme. BRGH = 0
(PIC16C73/73A/74/74A) ......................... 104
RX Pin Sampling Scheme, BRGH = 1
(PIC16C73/73A/74/74A) ......................... 104
(Address 10h) .......................................... 65
(Address 12h) .......................................... 70
(PIC16C76/77)......................................... 87
With CKE = 0) (PIC16C76/77) ................. 87
2
2
I
2
2
C 10-bit Address Format ........................ 90
C Waveforms for Transmission
C Waveforms for Reception
C Mode) ................................................ 93
1997 Microchip Technology Inc.
2
C Module in