ATMEGA644-20PU Atmel, ATMEGA644-20PU Datasheet - Page 308
![IC AVR MCU FLASH 64K 40DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA644-20PU
Manufacturer Part Number
ATMEGA644-20PU
Description
IC AVR MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN, ATAVRRZUSBSTICK, ATAVRRZ201
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA644-20PU
Manufacturer:
Atmel
Quantity:
1 930
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Table 25-18. JTAG Programming Instruction
308
Instruction
1a. Chip Erase
1b. Poll for Chip Erase Complete
2a. Enter Flash Write
2b. Load Address Extended High Byte
2c. Load Address High Byte
2d. Load Address Low Byte
2e. Load Data Low Byte
2f. Load Data High Byte
2g. Latch Data
2h. Write Flash Page
2i. Poll for Page Write Complete
3a. Enter Flash Read
3b. Load Address Extended High Byte
3c. Load Address High Byte
3d. Load Address Low Byte
3e. Read Data Low and High Byte
4a. Enter EEPROM Write
4b. Load Address High Byte
4c. Load Address Low Byte
4d. Load Data Byte
4e. Latch Data
4f. Write EEPROM Page
4g. Poll for Page Write Complete
ATmega644
Set
i = data in, x = don’t care
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte, o = data out,
TDI Sequence
0100011_10000000
0110001_10000000
0110011_10000000
0110011_10000000
0110011_10000000
0100011_00010000
0001011_cccccccc
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0010111_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0110111_00000000
0100011_00000010
0001011_cccccccc
0000111_aaaaaaaa
0000011_bbbbbbbb
0110010_00000000
0110110_00000000
0110111_00000000
0100011_00010001
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0110011_00000000
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
Notes
(2)
(10)
(1)
(1)
(10)
Low byte
High byte
(10)
(1)
(1)
(2)
(2)
2593N–AVR–07/10
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