UPSD3433EV-40T6 STMicroelectronics, UPSD3433EV-40T6 Datasheet - Page 252
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UPSD3433EV-40T6
Manufacturer Part Number
UPSD3433EV-40T6
Description
MCU 8BIT 8032 128KB FLASH 52TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3433EV-40T6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-TQFP, 52-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4908
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPSD3433EV-40T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
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PSD module
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assembly code example in
command the MCU module to Power Down mode after the PDS Module goes to Power-
Down mode. In this case, even though the code memory goes off-line in the PSD module,
the last few MCU instruction are sourced from the PFQ.
Forced power-down example
PDOWN:
LOOP:
Figure 88. Automatic power-down (APD) unit
PSD MODULE RST_
CLKIN (pin PD1)
CSI (pin PD2)
8032 ALE
PMMR0, BIT 1 (APD EN)
PMMR3, BIT 1 (FORCE_PD)
8032 DATA FROM MCU MODULE
8032 ADDR FROM MCU MODULE
ANL
ORL
MOV
CLR
JMP
NOP
MOVX
MOV
MOV
JMP
WHEN CSI FUNCTION IS SPECIFIED IN PSDSOFT EXPRESS,
CSI IS PART OF EQUATIONS FOR FSx, CSBOOTx, RS0, and CSIOP
TRANSITION
DETECTION
DETECTION
ENABLE
A8h, #7Fh
9Dh, #C0h
DPTR, #xxC7 ; load XDATA pointer to select PMMR3 register (xx = base
A
LOOP
@DPTR, A
87h, A
A, #02h
LOOP
EDGE
Table
TRANSITION
1 = FOUND
1 = FOUND
EDGE
, the PFQ will be loaded with the final instructions to
; disable all interrupts
; ensure PFQ and BC are enabled
; address of csiop registers)
; clear A
; first loop - fill PFQ/BQ with Power Down instructions
; second loop - fetch code from PFQ/BC and set Power-
; Down bits for PSD module and then MCU module
; loop
; set PD Bit in PCON register in MCU module in second
; loop
; set power-down bit in the A register, but not in PMMR3 or
; PCON yet in first loop
; uPSD enters into Power-Down mode in second loop
; set FORCE_PD Bit in PMMR3 in PSD module in second
UPSD3422, UPSD3433, UPSD3434, UPSD3454
CLEAR
UP-COUNTER
CLK
4-BIT APD
ENABLE
COUNT
FULL
PDN
PDN
CSI
DOWN MODE
1 = POWER
PDN
EQUATIONS
DPLD CHIP
SELECT
GPLD
ENABLE
8032 ADDR
8032 DATA
BUFFERS
OMC OUTPUTS
MODULE
CSBOOTx
LINE
PSD
CSIOP
FSx
RS0
AI06608B
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