UPSD3433EV-40T6 STMicroelectronics, UPSD3433EV-40T6 Datasheet - Page 263
![no-image](/images/manufacturer_photos/0/6/637/stmicroelectronics_sml.jpg)
UPSD3433EV-40T6
Manufacturer Part Number
UPSD3433EV-40T6
Description
MCU 8BIT 8032 128KB FLASH 52TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3422EV-40U6.pdf
(300 pages)
Specifications of UPSD3433EV-40T6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-TQFP, 52-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4908
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPSD3433EV-40T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
- Current page: 263 of 300
- Download datasheet (3Mb)
UPSD3422, UPSD3433, UPSD3434, UPSD3454
28.6.8
Figure 94. Example of chaining UPSD34xx devices
Debugging the 8032 MCU module
The 8032 on the MCU module may be debugged in-circuit using the same four basic JTAG
signals as used for JTAG ISP (TDI, TDO, TCK, TMS). The signals TSTAT and TERR are not
needed for debugging, and they will not create a problem if they exist on the circuit board
while debugging. The same connector specified in
ISP or for 8032 debugging. There are 3rd party suppliers of UPSD34xx JTAG debugging
equipment (check www.st.com/psm). These are small pods which connect to a PC (or
notebook computer) using a USB interface, and they are driven by an 8032 Integrated
Development Environment (IDE) running on the PC.
Standard debugging features are provided through this JTAG interface such as single-step,
breakpoints, trace, memory dump and fill, and others. There is also a dedicated Debug pin
(shown in
devices upon a programmable internal event (e.g., breakpoint match), or the pin can be
configured as an input so an external device can initiate an internal debug event (e.g., break
execution). The Debug pin function is configured by the 8032 IDE debug software tool. See
Section 12: Debug unit on page 60
The Debug signal should always be pulled up externally with a weak pull-up (100 kΩ
minimum) to V
Figure 92 on page
Connects Here
Programming
Equipment
or Test
JTAG
Figure 90 on page
CC
even if nothing is connected to it, as shown in
TSTAT
TERR
TMS
GND
TDO
261.
TCK
RST
V
TDI
CC
CONN.
JTAG
Optional
Optional
10K
258) which can be configured as an output to trigger external
Circuitry
System
Reset
for more details.
100K
100K
100K
100K
100K
Figure 93 on page 262
100K
Figure 91 on page 259
TMS
TCK
TDO
TMS
TCK
TDI
TDO
TMS
TCK
TDI
TDO
TSTAT
TERR
TDI
TSTAT
TERR
CIRCUIT BOARD
Device 2
Device N
Device 1
IEEE 1149.1
can be used for
Compliant
µPSD34xx
uPSD34xx
Device
PSD module
263/300
AI10459
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