C8051F804-GS Silicon Laboratories Inc, C8051F804-GS Datasheet - Page 246

• Manufacturer Part Number: C8051F804-GS
• Description: IC MCU 8BIT 16KB FLASH 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F80xr

Specifications of C8051F804-GS

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (3.9mm Width)
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1773-5

C8051F80x-83x
C2 Register Definition 30.4. FPCTL: C2 Flash Programming Control
C2 Address: 0x02
C2 Register Definition 30.5. FPDAT: C2 Flash Programming Data
C2 Address: 0xBF
246
Name
Reset
Name
Reset
7:0
7:0
Bit
Bit
Type
Type
Bit
Bit
FPDAT[7:0] C2 Flash Programming Data Register.
FPCTL[7:0] C2 Flash Programming Control Register.
Name
Name
7
0
7
0
This register is used to pass Flash commands, addresses, and data during C2 Flash
accesses. Valid commands are listed below.
Code
0x06
0x07
0x08
0x03
This register is used to enable Flash programming via the C2 interface. To enable C2
Flash programming, the following codes must be written in order: 0x02, 0x01. Once
C2 Flash programming is enabled, a system reset must be issued to resume normal
operation.
6
0
6
0
5
0
5
0
Command
Flash Block Read
Flash Block Write
Flash Page Erase
Device Erase
Rev. 1.0
4
0
4
0
FPCTL[7:0]
FPDAT[7:0]
R/W
R/W
Function
Function
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0