C8051F34B-GM Silicon Laboratories Inc, C8051F34B-GM Datasheet - Page 118
![IC 8051 MCU 32K FLASH MEM 32-QFN](/photos/12/27/122778/c8051f34b-gm_sml.jpg)
C8051F34B-GM
Manufacturer Part Number
C8051F34B-GM
Description
IC 8051 MCU 32K FLASH MEM 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheet
1.C8051F349-GQ.pdf
(276 pages)
Specifications of C8051F34B-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-QFN
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1351-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F34B-GM
Manufacturer:
Silicon Labs
Quantity:
135
- Current page: 118 of 276
- Download datasheet (2Mb)
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
118
Bit7:
Bit6:
Bit5:
Bit4:
Bits3–2: EMD1–0: EMIF Operating Mode Select.
Bits1–0: EALE1–0: ALE Pulse-Width Select Bits (only has effect when EMD2 = 0).
R/W
Bit7
-
Unused. Read = 0b. Write = don’t care.
USBFAE: USB FIFO Access Enable.
0: USB FIFO RAM not available through MOVX instructions.
1: USB FIFO RAM available using MOVX instructions. The 1k of USB RAM will be mapped
in XRAM space at addresses 0x0400 to 0x07FF. The USB clock must be active and
greater than or equal to twice the SYSCLK (USBCLK > 2 x SYSCLK) to access this
area with MOVX instructions.
Unused. Read = 0b. Write = don’t care.
EMD2: EMIF Multiplex Mode Select.
0: EMIF operates in multiplexed address/data mode.
1: EMIF operates in non-multiplexed mode (separate address and data pins).
These bits control the operating mode of the External Memory Interface.
00: Internal Only: MOVX accesses on-chip XRAM only. All effective addresses alias to
on-chip memory space.
01: Split Mode without Bank Select: Accesses below the on-chip XRAM boundary are
directed on-chip. Accesses above the on-chip XRAM boundary are directed off-chip. 8-bit
off-chip MOVX operations use the current contents of the Address High port latches to
resolve upper address byte. Note that in order to access off-chip space, EMI0CN must be
set to a page that is not contained in the on-chip address space.
10: Split Mode with Bank Select: Accesses below the on-chip XRAM boundary are directed
on-chip. Accesses above the on-chip XRAM boundary are directed off-chip. 8-bit off-chip
MOVX operations use the contents of EMI0CN to determine the high-byte of the address.
11: External Only: MOVX accesses off-chip XRAM only. On-chip XRAM is not visible to the
CPU.
00: ALE high and ALE low pulse width = 1 SYSCLK cycle.
01: ALE high and ALE low pulse width = 2 SYSCLK cycles.
10: ALE high and ALE low pulse width = 3 SYSCLK cycles.
11: ALE high and ALE low pulse width = 4 SYSCLK cycles.
SFR Definition 13.2. EMI0CF: External Memory Configuration
USBFAE
R/W
Bit6
R/W
Bit5
-
EMD2
R/W
Bit4
Rev. 1.3
EMD1
R/W
Bit3
EMD0
R/W
Bit2
EALE1
R/W
Bit1
SFR Address: 0x85
EALE0
R/W
Bit0
00000011
Reset Value
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