M30622F8PGP#U7C Renesas Electronics America, M30622F8PGP#U7C Datasheet - Page 320

IC M16C MCU FLASH 64K 100LQFP

M30622F8PGP#U7C

Manufacturer Part Number
M30622F8PGP#U7C
Description
IC M16C MCU FLASH 64K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30622F8PGP#U7C

Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30622F8PGP#U7CM30622F8PGP
Manufacturer:
MIT
Quantity:
1 000
Company:
Part Number:
M30622F8PGP#U7CM30622F8PGP
Manufacturer:
MIT
Quantity:
20 000
Company:
Part Number:
M30622F8PGP#U7CM30622F8PGP#D3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30622F8PGP#U7CM30622F8PGP#D5C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30622F8PGP#U7CM30622F8PGP#U3C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
22.5
22.5.1
22.5.2
In parallel I/O mode, the user ROM area and the boot ROM area can be rewritten by a parallel programmer
supporting the M16C/62P Group (M16C/62P, M16C/62PT). Contact your parallel programmer manufacturer for
more information on the parallel programmer. Refer to the user's manual included with your parallel programmer
for instructions.
An erase block operation in the boot ROM area is applied to only one 4 Kbyte block. The rewrite control
program in standard serial I/O mode is written in the boot ROM area before shipment. Do not rewrite the boot
ROM area if using the serial programmer.
In parallel I/O mode, the boot ROM area is located in addresses 0FF000h to 0FFFFFh. Rewrite this address
range only if rewriting the boot ROM area. (Do not access addresses other than addresses 0FF000h to
0FFFFFh.)
The ROM code protect function prevents the flash memory from being read and rewritten in parallel I/O mode.
(Refer to 22.2 Functions To Prevent Flash Memory from Rewriting.)
Parallel I/O Mode
Jan 10, 2006
User ROM and Boot ROM Areas
ROM Code Protect Function
Page 303 of 390
22. Flash Memory Version

Related parts for M30622F8PGP#U7C