MC9S12XDP512MAG Freescale Semiconductor, MC9S12XDP512MAG Datasheet - Page 120

IC MCU 512K FLASH 144-LQFP

MC9S12XDP512MAG

Manufacturer Part Number
MC9S12XDP512MAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDP512MAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Operating Supply Voltage
0 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Package
144LQFP
Family Name
HCS12
Maximum Speed
40 MHz
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 3 Pierce Oscillator (S12XOSCLCPV1)
3.1.3
Figure 3-1
3.2
This section lists and describes the signals that connect off chip
3.2.1
Theses pins provides operating voltage (V
allows the supply voltage to the XOSC to be independently bypassed.
3.2.2
These pins provide the interface for either a crystal or a CMOS compatible clock to control the internal
clock generator circuitry. EXTAL is the external clock input or the input to the crystal oscillator amplifier.
XTAL is the output of the crystal oscillator amplifier. The MCU internal system clock is derived from the
120
External Signal Description
shows a block diagram of the XOSC.
Block Diagram
V
EXTAL and XTAL — Input and Output Pins
DDPLL
and V
Detector
Peak
EXTAL
SSPLL
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 3-1. XOSC Block Diagram
— Operating and Ground Voltage Pins
Gain Control
DDPLL
Monitor
Clock
) and ground (V
Rf
V
DDPLL
Monitor_Failure
= 2.5 V
OSCCLK
SSPLL
XTAL
) for the XOSC circuitry. This
Freescale Semiconductor

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