MPC5125YVN400 Freescale Semiconductor, MPC5125YVN400 Datasheet - Page 72

IC MCU 32BIT E300 324TEPBGA

MPC5125YVN400

Manufacturer Part Number
MPC5125YVN400
Description
IC MCU 32BIT E300 324TEPBGA
Manufacturer
Freescale Semiconductor
Series
MPC51xxr

Specifications of MPC5125YVN400

Core Processor
e300
Core Size
32-Bit
Speed
400MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, USB OTG
Peripherals
DMA, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.33 V ~ 1.47 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC51xx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
TWR-MPC5125-KIT, TWR-SER, TWR-ELEV, TOWER
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
1.4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
3.3 V
Interface Type
CAN, I2C
Minimum Operating Temperature
- 40 C
Program Memory Size
32 bit
Cpu Speed
400MHz
Embedded Interface Type
CAN, I2C, SPI, UART, USB
Digital Ic Case Style
TEPBGA
No. Of Pins
324
Rohs Compliant
Yes
Cpu Family
MPC5xx
Device Core Size
32b
Frequency (max)
400MHz
Total Internal Ram Size
32KB
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
324
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MPC5125YVN400
Manufacturer:
LTC
Quantity:
29
Part Number:
MPC5125YVN400
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical and Thermal Characteristics
4.3.14
See the MPC5125 Reference Manual (MPC5125RM).
4.3.15
The programmable serial controllers (PSC) support different modes of operation (UART, codec, AC97, SPI).
All the timing numbers specified for different PSC modes are design targets.
4.3.15.1
NOTES:
1
2
72
Output timing is specified at a nominal 50 pF load.
Bit clock cycle time.
Sym
1
2
3
4
5
6
7
8
SCL
SDA
Bit clock cycle time, programmed in CCS register
Clock duty cycle
Bit clock fall time
Bit clock rise time
FrameSync valid after clock edge
FrameSync invalid after clock edge
Output data valid after clock edge
Input data setup time
Table 39. Timing Specifications — 8-, 16-, 24-, and 32-Bit CODEC/I
J1850
PSC
Codec Mode (8-, 16-, 24-, and 32-Bit) / I
1
2
Figure 37. Timing Diagram — I
Description
MPC5125 Microcontroller Data Sheet, Rev. 3
4
6
7
2
C Input / Output
40.0
2
Min
6.0
45
S Mode
8
5
Typ
50
3
2
S Master Mode
Max
7.9
8.4
8.4
7.9
9.3
55
Freescale Semiconductor
9
Units
%
ns
ns
ns
ns
ns
ns
ns
1
2
SpecID
A20.1
A20.2
A20.3
A20.4
A20.5
A20.6
A20.7
A20.8

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