M30843FJFP#U3 Renesas Electronics America, M30843FJFP#U3 Datasheet - Page 157
M30843FJFP#U3
Manufacturer Part Number
M30843FJFP#U3
Description
IC M32C MCU FLASH 512K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30843FJFP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30843FJFP#U3M30843FJFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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12.1 Count Source Protection Mode
3
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2
0
C
In count source protection mode, the on-chip oscillator clock is used as a count source for the watchdog
timer. The count source protection mode allows the on-chip oscillator clock to run continuously, maintain-
ing watchdog timer operation even if the program error occurs and the CPU clock stops running.
Follow the procedures below when using this mode.
(1) Set the PRC0 bit in the PRCR register to "1" (write to CM0 register enabled)
(2) Set the PRC1 bit in the PRCR register to "1" (write to PM2 register enabled)
(3) Set the CM06 bit in the CM0 register to "1" (reset when the watchdog timer overflows)
(4) Set the PM22 bit in the PM2 register to "1" (the on-chip oscillator clock as a count source of the watch-
(5) Set the PRC0 bit to "0" (write to CM0 register disabled)
(6) Set the PRC1 bit to "0" (write to PM2 register disabled)
(7) Write to the WDTS register (the watchdog timer starts counting)
1
9
0 .
8 /
B
The followings will occur when the PM22 bit is set to "1".
0
1
dog timer)
4
0
• The on-chip oscillator starts oscillating and the on-chip oscillator clock becomes a count source for
• Write to the CM10 bit in the CM1 register is disabled. (The bit setting remains unchanged even if set
3
• In wait mode or hold state, the watchdog timer continues running. However, the watchdog timer
G
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the watchdog timer.
it to "1". The microcomputer does not enter stop mode.)
o r
interrupt cannot be used to exit wait mode.
0 -
. l
Watchdog timer cycle =
u
0
1
p
, 7
0
1
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2
M
0
3
0
5
2
C
8 /
Page 134
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9
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Counter value of watchdog timer (32768)
On-chip oscillator clock
12. Watchdog Timer
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