M30843FJFP#U3 Renesas Electronics America, M30843FJFP#U3 Datasheet - Page 358
M30843FJFP#U3
Manufacturer Part Number
M30843FJFP#U3
Description
IC M32C MCU FLASH 512K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Specifications of M30843FJFP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30843FJFP#U3M30843FJFP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
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2
Figure 23.9 C0BRP Register
0
C
23.1.7 CAN0 Baud Rate Prescaler (C0BRP Register)
1
9
8 /
0 .
B
0
1
4
0
G
The C0BRP register determines the Tq clock cycle of the CAN bit time. The baud rate is obtained
from Tq clock cycle x Tq per bit.
Tq: Time quantum
SS: Synchronization Segment; 1 Tq
PBS1: Phase Buffer Segment 1; 2 to 8 Tq
3
J
6
u
o r
0 -
. l
CAN0 Baud Rate Prescaler
b7
Tq clock cycle = (BRP+1) / CAN clock
Baud rate =
Tq per bit = SS + PTS + PBS1 + PBS2
u
0
1
NOTES:
p
, 7
0
1
(
1. Value is obtained by setting the SLEEP bit in the C0SLPR register to "1" (sleep mode exited) after
2. Do not set to "00
2
M
0
reset and supplying the clock to the CAN module.
3
0
2
5
C
8 /
Page 335
, 4
Tq clcok cycle x Tq per bit
M
3
2
C
16
b0
8 /
" (divide-by-1).
f o
4
4
) T
If setting value is n, the CPU clock is divided
by (n+1).
9
5
Symbol
C0BRP
1
Address
0217
Function
16
BRP: Setting value of the C0BPR register; 1-255
PTS: Propagation Time Segment; 1 to 8 Tq
PBS2: Phase Buffer Segment 2; 2 to 8 Tq
After Reset
0000 0001
Setting Range
01
2
(1)
16
to FF
16 (2)
23. CAN Module
RW
RW
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