MCIMX512CJM6C Freescale Semiconductor, MCIMX512CJM6C Datasheet - Page 148

• Manufacturer Part Number: MCIMX512CJM6C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX512CJM6C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Electrical Characteristics
4.7.18
Electrical and timing specifications of Parallel Interface are presented in the subsequent sections.
Figure 107
specification for ULPI parallel mode.
148
1
H3 routed to NANDF I/O is recommended for Full and Low-Speed use only.
US15
US16
US17
US17
ID
USB_Data[7:0]
USB_Nxt
USB_Clk
USB_Stp
USB_Dir
Setup Time (Dir, Nxt in, Data in)
Hold Time (Dir, Nxt in, Data in)
Output delay Time (Stp out, Data out) for H3 routed to DISP2 I/O
and H1
Output delay Time (Stp out, Data out) for H2
Name
USB_Stp
USB_Data
USB_Clk
USB_Dir/Nxt
USB Parallel Interface Timing
shows the USB transmit/receive waveform in parallel mode.
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Table 121. Signal Definitions—Parallel Interface (Normal ULPI)
Figure 107. USB Transmit/Receive Waveform in Parallel Mode
Table 122. USB Timing Specification for ULPI Parallel Mode
US15
US15
Parameter
Direction
Out
I/O
In
In
In
US16
US16
Interface clock. All interface signals are synchronous to Clock.
Bi-directional data bus, driven low by the link during idle. Bus
ownership is determined by Dir.
Direction. Control the direction of the Data bus.
Stop. The link asserts this signal for 1 clock cycle to stop the data
stream currently on the bus.
Next. The PHY asserts this signal to throttle the data.
US17
1
Min
—
—
6
0
Signal Description
US17
Table 122
Max
11
—
—
9
Unit
shows the USB timing
ns
ns
ns
ns
Freescale Semiconductor
Reference Signal
Conditions/
10 pF
10 pF
10 pF
10 pF