PIC12F609-I/MF Microchip Technology, PIC12F609-I/MF Datasheet - Page 111
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PIC12F609-I/MF
Manufacturer Part Number
PIC12F609-I/MF
Description
IC PIC MCU FLASH 1KX14 8-DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(8 pages)
3.PIC12F609T-ISN.pdf
(26 pages)
4.PIC12F609T-ISN.pdf
(8 pages)
5.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F609-I/MF
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
Controller Family/series
PIC12
No. Of I/o's
5
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F609T-ISN PDF datasheet #4
- PIC12F615-EMF PDF datasheet #5
- Current page: 111 of 196
- Download datasheet (3Mb)
11.6.2
It should also be taken in account that under worst-
case conditions (i.e., V
Max. WDT prescaler) it may take several seconds
before a WDT time out occurs.
FIGURE 11-2:
TABLE 11-8:
TABLE 11-9:
© 2008 Microchip Technology Inc.
OPTION_REG
CONFIG
Legend:
Note 1:
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTRC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
T0CKI
pin
(= F
Name
CLKOUT
Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION register.
OSC
T0SE
Shaded cells are not used by the Watchdog Timer.
See Register 11-1 for operation of all Configuration Word register bits.
/4)
WDT PROGRAMMING
CONSIDERATIONS
IOSCFS
GPPU
Bit 7
WDT STATUS
SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER
Watchdog
WDTE
Timer
WATCHDOG TIMER BLOCK DIAGRAM
DD
INTEDG
T0CS
= Min., Temperature = Max.,
Bit 6
CP
0
1
MCLRE
T0CS
Conditions
Bit 5
PSA
0
1
PWRTE
PIC12F609/615/12HV609/615
T0SE
Bit 4
Prescaler
8-bit
WDTE
Bit 3
PSA
8
PS<2:0>
FOSC2
Bit 2
PS2
3
FOSC1
Bit 1
PS1
PSA
PSA
1
0
1
0
FOSC0
Bit 0
PS0
SYNC 2
Time-Out
Cycles
WDT
Cleared until the end of OST
1111 1111
POR, BOR
Value on
—
Cleared
WDT
DS41302B-page 109
Data Bus
Set Flag bit T0IF
8
TMR0
on Overflow
1111 1111
Value on
all other
Resets
—
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