ATTINY2313A-MUR Atmel, ATTINY2313A-MUR Datasheet - Page 182
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ATTINY2313A-MUR
Manufacturer Part Number
ATTINY2313A-MUR
Description
MCU AVR 2K FLASH 20MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY2313A-MU.pdf
(270 pages)
Specifications of ATTINY2313A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY2313A-MUR
Manufacturer:
LT
Quantity:
4 439
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20.5
20.5.1
182
Parallel Programming Parameters, Pin Mapping, and Commands
ATtiny2313A/4313
Signal Names
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the ATtiny2313A/4313. Pulses are assumed
to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATtiny2313A/4313 are referenced by signal names describing
their functionality during parallel programming, see
Pins not described in the following table are referenced by pin names.
Figure 20-1. Parallel Programming
Table 20-9.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
Signal Name in
Programming
BS1/PAGEL
RDY/BSY
XA1/BS2
DATA I/O
Mode
XA0
WR
OE
Pin Name Mapping
PB7-0
Name
PD1
PD2
PD3
PD4
PD5
PD6
Pin
BS1/PAGEL
RDY/BSY
XA1/BS2
Table 20-11 on page
+12 V
XA0
WR
OE
I/O
I/O
O
I
I
I
I
I
Function
0: Device is busy programming,
1: Device is ready for new command.
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1 (“0” selects low byte, “1” selects high byte).
Program Memory and EEPROM Data Page Load.
XTAL Action Bit 0
XTAL Action Bit 1.
Byte Select 2 (“0” selects low byte, “1” selects 2’nd high
byte).
Bi-directional Data bus (Output when OE is low).
PD1
PD2
PD3
PD4
PD5
PD6
RESET
XTAL1
GND
183.
PB7 - PB0
Figure 20-1
VCC
+5V
DATA I/O
and
Table 20-9 on page
8246A–AVR–11/09
182.
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