AT89LP216-20PU Atmel, AT89LP216-20PU Datasheet - Page 22

• Manufacturer Part Number: AT89LP216-20PU
• Description: MCU 8051 2K FLASH 20MHZ 16-PDIP
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP216-20PU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-DIP (0.300", 7.62mm)
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89ISP
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 12-4.
13. I/O Ports
13.1
22
Symbol
PGH
PSH
PT1H
PX1H
PT0H
PX0H
IPH = B7H
Not Bit Addressable
Bit
Port Configuration
AT89LP216
Function
General-purpose Interrupt Priority High
Serial Port Interrupt Priority High
Timer 1 Interrupt Priority High
External Interrupt 1 Priority High
Timer 0 Interrupt Priority High
External Interrupt 0 Priority High
IPH
–
7
– Interrupt Priority High Register
The AT89LP216 can be configured for between 11 and 14 I/O pins. The exact number of I/O
pins available depends on the clock and reset options as shown in
5V tolerant as inputs, that is they can be pulled up or driven to 5.5V even when operating at a
lower V
lup is required to convert outputs to CMOS levels.
Table 13-1.
All port pins on the AT89LP216 may be configured to one of four modes: quasi-bidirectional
(standard 8051 port outputs), push-pull output, open-drain output, or input-only. Port modes may
be assigned in software on a pin-by-pin basis as shown in
Fuse determines the default state of the port pins. When the fuse is enabled, all port pins default
to input-only mode after reset, with the exception of P1.4 which starts in quasi-bidirectional
mode. When the fuse is disabled, all port pins, with the exception of P1.0 and P1.1, default to
quasi-bidirectional mode after reset and are weakly pulled high. Each port pin also has a
Schmitt-triggered input for improved input noise rejection. During Power-down all the Schmitt-
triggered inputs are disabled with the exception of P1.3, P3.2 and P3.3, which may be used to
wake up the device. Therefore P1.3, P3.2 and P3.3 should not be left floating during Power-
down.
Clock Source
External Crystal or Resonator
External Clock
Internal RC Oscillator
–
6
CC
such as 3V. Inputs use CMOS levels while outputs use TTL levels. An external pul-
I/O Pin Configurations
PGH
5
PSH
4
External RST Pin
No external reset
External RST Pin
No external reset
External RST Pin
No external reset
Reset Option
PT1H
3
PX1H
2
Table
Reset Value = X000 0000B
13-2. The Tristate-Port User
PT0H
Table
1
Number of I/O Pins
13-1. All port pins are
3621E–MICRO–11/10
PX0H
11
12
12
13
13
14
0