ATTINY2313V-10MUR Atmel, ATTINY2313V-10MUR Datasheet - Page 15
![MCU AVR 2KB FLASH 10MHZ 20QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY2313V-10MUR
Manufacturer Part Number
ATTINY2313V-10MUR
Description
MCU AVR 2KB FLASH 10MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY2313V-10MUR
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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SRAM Data
Memory
Data Memory Access
Times
2543L–AVR–08/10
Figure 9
The lower 224 data memory locations address both the Register File, the I/O memory, Extended
I/O memory, and the internal data SRAM. The first 32 locations address the Register File, the
next 64 location the standard I/O memory, and the next 128 locations address the internal data
SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 128 bytes of internal data
SRAM in the ATtiny2313 are all accessible through all these addressing modes. The Register
File is described in
Figure 9. Data Memory Map
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
shows how the ATtiny2313 SRAM Memory is organized.
“General Purpose Register File” on page
64 I/O Registers
Data Memory
Internal SRAM
32 Registers
(128 x 8)
0x00DF
0x0000 - 0x001F
0x0020 - 0x005F
0x0060
CPU
cycles as described in
9.
Figure
10.
15
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