ATTINY43U-MUR Atmel, ATTINY43U-MUR Datasheet - Page 119
![MCU AVR 4KB FLASH 8MHZ 20QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY43U-MUR
Manufacturer Part Number
ATTINY43U-MUR
Description
MCU AVR 4KB FLASH 8MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY43U-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8048B–AVR–03/09
Figure 16-5. ADC Timing Diagram, Single Conversion
When Auto Triggering is used, the prescaler is reset when the trigger event occurs, as shown in
Figure 16-6
this mode, the sample-and-hold takes place two ADC clock cycles after the rising edge on the
trigger source signal. Three additional CPU clock cycles are used for synchronization logic.
Figure 16-6. ADC Timing Diagram, Auto Triggered Conversion
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. See
Cycle Number
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
Prescaler
Reset
below. This assures a fixed delay from the trigger event to the start of conversion. In
1
MUX and REFS
Update
1
2
MUX and REFS
Update
2
3
Sample & Hold
3
4
Sample &
Hold
4
5
Figure
5
6
6
7
One Conversion
16-7.
7
8
One Conversion
8
9
9
10
Conversion
Complete
10
Conversion
11
Complete
11
12
12
13
13
Sign and MSB of Result
LSB of Result
Next Conversion
Sign and MSB of Result
1
LSB of Result
2
Next Conversion
MUX and REFS
Update
1
Prescaler
Reset
3
2
119
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