ATTINY43U-MUR Atmel, ATTINY43U-MUR Datasheet - Page 31

MCU AVR 4KB FLASH 8MHZ 20QFN

ATTINY43U-MUR

Manufacturer Part Number
ATTINY43U-MUR
Description
MCU AVR 4KB FLASH 8MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY43U-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7. Power Management and Sleep Modes
7.1
7.1.1
8048B–AVR–03/09
Sleep Modes
Idle Mode
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
Figure 6-1 on page 23
The figure is helpful in selecting an appropriate sleep mode.
sleep modes and their wake-up sources.
Table 7-1.
Note:
To enter any of the sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM1:0 bits in the MCUCR Register select which sleep
mode (Idle, ADC Noise Reduction or Power-down) will be activated by the SLEEP instruction.
See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Note that if a level triggered interrupt is used for wake-up the changed level must be held for
some time to wake up the MCU (and for the MCU to enter the interrupt service routine). See
“External Interrupts” on page 58
When the SM1:0 bits are written to 00, the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing Analog Comparator, ADC, Timer/Counter, Watchdog, and the
interrupt system to continue operating. This sleep mode basically halts clk
allowing the other clocks to run.
Sleep Mode
Idle
ADC Noise Reduction
Power-down
“Software BOD Disable” on page 32
Table 7-2 on page 34
1. For INT0, only level interrupt.
Active Clock Domains and Wake-up Sources in the Different Sleep Modes
presents the different clock systems in ATtiny43U, and their distribution.
Active Clock Domains
for a summary.
for details.
X
for more details.
X
X
Oscillators
X
X
Table 7-1
X
X
X
(1)
(1)
below shows the different
Wake-up Sources
CPU
X
X
and clk
X
X
FLASH
X
, while
X
X
X
31

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