PIC16F716-I/SS Microchip Technology, PIC16F716-I/SS Datasheet - Page 231

• Manufacturer Part Number: PIC16F716-I/SS
• Description: IC PIC MCU FLASH 2KX14 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F716-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 20-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162054 - HEADER INTERFACE ICD2 16F716AC164018 - MODULE SKT PROMATEII 20SSOP
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.3.5
SS
SCK (CKP = 0,
SCK (CKP = 1,
Write to
SSPBUF
SDO
SDI
(SMP = 0)
Input
Sample (SMP = 0)
optional
SSPIF
SSPSR to
SSPBUF
1997 Microchip Technology Inc.
CKE = 0)
CKE = 0)
Slave Operation
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched, the interrupt flag bit SSPIF is set.
The clock polarity is selected by appropriately programming bit CKP (SSPCON<4>). This then
would give waveforms for SPI communication as shown in
Figure 15-5
the minimum high and low times.
In sleep mode, the slave can transmit and receive data. When a byte is received, the device will
wake-up from sleep, if the interrupt is enabled.
Figure 15-4:
bit7
bit7
where the MSb is transmitted first. When in slave mode the external clock must meet
SPI Mode Waveform (Slave Mode With CKE = 0)
bit6
bit5
bit4
bit3
Section 15. SSP
bit2
Figure
bit1
15-3,
bit0
DS31015A-page 15-11
bit0
Figure
Next Q4 Cycle
after Q2
15-4, and
15