PIC16F716-I/SS Microchip Technology, PIC16F716-I/SS Datasheet - Page 261

IC PIC MCU FLASH 2KX14 20SSOP

PIC16F716-I/SS

Manufacturer Part Number
PIC16F716-I/SS
Description
IC PIC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F716-I/SS

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPI3-DB16F716 - BOARD DAUGHTER ICEPIC3AC164307 - MODULE SKT FOR PM3 28SSOPAC162054 - HEADER INTERFACE ICD2 16F716AC164018 - MODULE SKT PROMATEII 20SSOP
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F716-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
16.3.5
1997 Microchip Technology Inc.
SSPIF
Interrupt flag
SCK
(CKP = 0)
SCK
(CKP = 1)
Slave Operation
SDO
SDI
In slave mode, the data is transmitted and received as the external clock pulses appear on SCK.
When the last bit is latched the SSPIF interrupt flag bit is set.
The clock polarity is selected by appropriately programming the CKP bit (SSPCON<4>). This
then would give waveforms for SPI communication as shown in
where the MSb is transmitted first. When in slave mode the external clock must meet the mini-
mum high and low times.
In sleep mode, the slave can transmit and receive data and wake the device from sleep if the
interrupt is enabled.
Figure 16-4: SPI Mode Waveform (Slave Mode w/o SS Control)
bit7
bit7
bit6
bit5
bit4
bit3
Section 16. BSSP
bit2
bit1
Figure 16-5
DS31016A-page 16-11
bit0
bit0
and
Next Q4 Cycle
Figure 16-5
after Q2
16

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