ATMEGA88-20MUR Atmel, ATMEGA88-20MUR Datasheet - Page 368

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ATMEGA88-20MUR

Manufacturer Part Number
ATMEGA88-20MUR
Description
MCU AVR 8K FLASH 20MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20MUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
MLF EP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
36.18 Rev. 2545C-04/04
36.19 Rev. 2545B-01/04
2545T–AVR–05/11
4.
5.
6.
7.
8.
9.
10.
11.
1.
2.
3.
4.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
Added item 2 to 5 in
Updated C code examples containing old IAR syntax.
Updated BLBSET description in
Moved
“TIFR2 – Timer/Counter2 interrupt flag register” on page 158
“Register description” on page
Updated cross-reference in
Updated equation in
Added
Updated
Updated Ordering Information for
Updated
page
Updated equation in
Speed Grades changed: 12MHz to 10MHz and 24MHz to 20MHz
Updated
Updated
Updated
Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption
Estimates in
Updated
value.
Added section
the PRR bits to 2-wire, Timer/Counters, USART, Analog Comparator and ADC
sections.
Updated
Updated
Extra Compare Match Interrupt OCF2B added to features in section
Timer/Counter2 with PWM and asynchronous operation” on page 140
Updated
on page 286 to 288 and
285. Fixed typo in
Updated whole
Renamed the following bits:
- SPMEN to SELFPRGEN
- PSR2 to PSRASY
- PSR10 to PSRSYNC
- Watchdog Reset to Watchdog System Reset
tus register” on page
361.
“Page size” on page
“TIMSK2 – Timer/Counter2 interrupt mask register” on page 158
“Serial programming algorithm” on page
“Speed grades” on page
“Ordering information” on page
“Errata Atmel ATmega88” on page
“Watchdog timer” on page
Figure 16-2 on page 130
“Errata Atmel ATmega88” on page 360
“Stack pointer” on page 13
Table 10-1 on page
36.“Features” on page
“Power reduction register” on page 41
“Typical characteristics” on page
Table 13-1 on page
“Errata Atmel ATmega48” on page
“Bit rate generator unit” on page
“Bit rate generator unit” on page
283.
Table 24-1 on page
“Electrical interconnection” on page
289.
39,
153.
“SPMCSR – Store program memory control and sta-
“Atmel ATmega168” on page
Table 24-5 on page
305.
and
1.
49.
with RAMEND as recommended Stack Pointer
67.
Table 16-3 on page
350.
249. Added note 2 to
360.
315.
and
299.
ATmega48/88/168
216.
216.
and a note regarding the use of
“Errata Atmel ATmega168” on
259,
357.
131.
Table 28-4
to
352.
210.
Table 28-1 on page
to
and
Table 28-7
“8-bit
368

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