ATA6616-P3QW Atmel, ATA6616-P3QW Datasheet - Page 229

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ATA6616-P3QW

Manufacturer Part Number
ATA6616-P3QW
Description
TXRX MULTICHIP MOD LIN SIP 38QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6616-P3QW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
ATA6616-P3QW
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4.18.12
4.18.12.1
9132D–AUTO–12/10
Register Description
ADMUX – ADC Multiplexer Selection Register
• Bit 7:6 – REFS1:REFS0: Voltage Reference Selection Bits
These bits and AREFEN bit from the Analog Miscellaneous Control Register (AMISCR) select
the voltage reference for the ADC, as shown in
conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA
register is set). Whenever these bits are changed, the next conversion will take 25 ADC clock
cycles. If active channels are used, using AVCC or an external AREF higher than (AVcc - 1V)
is not recommended, as this will affect ADC accuracy. The internal voltage reference options
may not be used if an external voltage is being applied to the AREF pin.
Table 4-58.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Regis-
ter. Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted.
Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any
ongoing conversions. For a complete description of this bit, see
Data Register” on page
• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits
These bits select which combination of analog inputs are connected to the ADC. In case of dif-
ferential input, gain selection is also made with these bits. Refer to
these bits are changed during a conversion, the change will not go into effect until this
conversion is complete (ADIF in ADCSRA register is set).
Bit
Read/Write
Initial Value
REFS1
X
X
0
1
REFS0
Voltage Reference Selections for ADC
REFS1
R/W
0
0
1
1
7
0
REFS0
232.
AREFEN Voltage Reference (V
R/W
6
0
0
1
0
0
ADLAR
R/W
AVcc used as Voltage Reference, disconnected from AREF pin.
External Voltage Reference at AREF pin (AREF
Internal 1.1V Voltage Reference.
Internal 2.56V Voltage Reference.
5
0
MUX4
R/W
4
0
Atmel ATA6616/ATA6617
Table
MUX3
R/W
3
0
4-58. If these bits are changed during a
REF
) Selection
MUX2
R/W
2
0
“ADCL and ADCH – The ADC
MUX1
R/W
Table 4-59
1
0
MUX0
R/W
0
0
2.0V)
for details. If
ADMUX
229

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