DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet - Page 174

• Manufacturer Part Number: DSPIC33FJ12GP202-I/SS
• Description: IC DSPIC MCU/DSP 12K 28SSOP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12GP202-I/SS

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SSOP
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 10-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ12GP201/202
REGISTER 18-6:
REGISTER 18-7:
DS70264D-page 172
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
Note 1: On devices without 10 analog inputs, all AD1CSSL bits can be selected by user application. However,
Note 1: On devices without 10 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
PCFG7
R/W-0
R/W-0
CSS7
U-0
U-0
—
—
2: CSSx = ANx, where x = 0 through 9.
2: PCFGx = ANx, where x = 0 through 9.
3: PCFGx bits have no effect if the ADC module is disabled by setting the ADxMD bit in the PMDx register..
inputs selected for scan without a corresponding input on device converts V
ports without a corresponding input on device.
When that bit is set, all port pins that have been multiplexed with ANx will be in Digital mode.
Unimplemented: Read as ‘0’
CSS<9:0>: ADC Input Scan Selection bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Unimplemented: Read as ‘0’
PCFG<9:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG6
R/W-0
R/W-0
CSS6
U-0
U-0
—
—
AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW
AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
CSS5
U-0
U-0
—
—
PCFG4
R/W-0
R/W-0
CSS4
Preliminary
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG3
R/W-0
R/W-0
CSS3
U-0
U-0
—
—
PCFG2
R/W-0
R/W-0
CSS2
U-0
U-0
—
—
© 2009 Microchip Technology Inc.
REFL
(1,2)
x = Bit is unknown
x = Bit is unknown
.
PCFG9
PCFG1
R/W-0
R/W-0
R/W-0
R/W-0
CSS9
CSS1
(1,2,3)
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
R/W-0
CSS8
CSS0
SS
bit 8
bit 0
bit 8
bit 0