PIC16F883-I/ML Microchip Technology, PIC16F883-I/ML Datasheet - Page 28
![IC PIC MCU FLASH 4KX14 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F883-I/ML
Manufacturer Part Number
PIC16F883-I/ML
Description
IC PIC MCU FLASH 4KX14 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.MCP1631RD-MCC2.pdf
(328 pages)
3.PIC16F882-ISS.pdf
(16 pages)
4.PIC16F882-ISS.pdf
(36 pages)
Specifications of PIC16F883-I/ML
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
MSSP, EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164120-3
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Package
28QFN EP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP1631RD-MCC2 - REFERENCE DESIGN MCP1631HVXLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F883-I/ML
Manufacturer:
MICROCHIP
Quantity:
1 200
- PIC16F616T-ISL PDF datasheet
- MCP1631RD-MCC2 PDF datasheet #2
- PIC16F882-ISS PDF datasheet #3
- PIC16F882-ISS PDF datasheet #4
- Current page: 28 of 328
- Download datasheet (6Mb)
PIC16F882/883/884/886/887
TABLE 2-1:
DS41291F-page 26
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Addr
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
ADRESH
ADCON0
1:
2:
3:
4:
Name
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
MCLR and WDT Reset do not affect the previous value data latch. The RBIF bit will be cleared upon Reset but will set again if the
mismatch exists.
When SSPCON register bits SSPM<3:0> = 1001, any reads or writes to the SSPADD SFR address are accessed through the SSPMSK
register. See Registers • and 13-4 for more detail.
Port pins with analog functions controlled by the ANSEL and ANSELH registers will read ‘0’ immediately after a Reset even though the
data latches are either undefined (POR) or unchanged (other Resets).
PIC16F884/PIC16F887 only.
(3)
(3)
(3)
(3,4)
(3)
(2)
PIC16F882/883/884/886/887 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Timer2 Module Register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM Register 1 Low Byte (LSB)
Capture/Compare/PWM Register 1 High Byte (MSB)
EUSART Transmit Data Register
EUSART Receive Data Register
Capture/Compare/PWM Register 2 Low Byte (LSB)
Capture/Compare/PWM Register 2 High Byte (MSB)
A/D Result Register High Byte
T1GINV
ADCS1
OSFIF
WCOL
SPEN
P1M1
Bit 7
RC7
RD7
RA7
RB7
IRP
GIE
—
—
—
—
—
TOUTPS3 TOUTPS2
TMR1GE
SSPOV
ADCS0
P1M0
Bit 6
PEIE
ADIF
RC6
RD6
C2IF
RP1
RA6
RB6
RX9
—
—
—
T1CKPS1
SSPEN
DC1B1
DC2B1
SREN
CHS3
RCIF
Bit 5
T0IE
C1IF
RP0
RA5
RB5
RC5
RD5
—
—
Write Buffer for upper 5 bits of Program Counter
TOUTPS1
T1CKPS0
DC1B0
DC2B0
CREN
CHS2
Bit 4
INTE
TXIF
EEIF
RC4
RD4
CKP
RA4
RB4
TO
—
T1OSCEN
TOUTPS0
CCP1M3
CCP2M3
ADDEN
SSPM3
SSPIF
BCLIF
CHS1
RBIE
Bit 3
RA3
RB3
RC3
RD3
RE3
PD
ULPWUIF
TMR2ON
T1SYNC
CCP1M2
CCP2M2
CCP1IF
SSPM2
RE2
FERR
CHS0
Bit 2
RC2
RD2
T0IF
RA2
RB2
Z
(4)
GO/DONE
T2CKPS1 T2CKPS0
TMR1CS
CCP1M1
CCP2M1
TMR2IF
SSPM1
RE1
OERR
Bit 1
INTF
RA1
RB1
RC1
RD1
DC
—
(4)
© 2009 Microchip Technology Inc.
TMR1ON
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
RBIF
RE0
ADON
RX9D
Bit 0
RA0
RB0
RC0
RD0
C
(4)
(1)
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
---- xxxx
---0 0000
0000 000x
-000 0000
0000 00-0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
-000 0000
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
0000 0000
0000 000x
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
--00 0000
xxxx xxxx
0000 0000
POR, BOR
Value on
183,217
181,217
126,217
126,217
124,217
161,217
153,217
158,217
126,217
126,218
125,218
104,218
37,217
73,217
37,217
29,217
37,217
39,217
48,217
53,217
57,217
59,217
37,217
31,217
34,217
35,217
76,217
76,217
79,217
81,217
82,217
99,218
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