PIC12C671-10/SM Microchip Technology, PIC12C671-10/SM Datasheet - Page 100
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PIC12C671-10/SM
Manufacturer Part Number
PIC12C671-10/SM
Description
IC MCU OTP 1KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C671-10/SM
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C671-10/SMR
PIC12C671-10/SMR
PIC12C671-10/SMR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12C671-10/SM
Manufacturer:
Microchip Technology
Quantity:
135
- Current page: 100 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
6.2.4.1
6.2.5
DS31006A-page 6-6
Computed GOTO
Stack
A computed GOTO is accomplished by adding an offset to the program counter (ADDWF PCL).
When doing a table read using a computed GOTO method, care should be exercised if the table
location crosses a PCL memory boundary (each 256 byte block).
The stack allows a combination of up to 8 program calls and interrupts to occur. The stack con-
tains the return address from this branch in program execution.
Mid-Range MCU devices have an 8-level deep x 13-bit wide hardware stack. The stack space is
not part of either program or data space and the stack pointer is not readable or writable. The PC
is PUSHed onto the stack when a CALL instruction is executed or an interrupt causes a branch.
The stack is POPed in the event of a RETURN, RETLW or a RETFIE instruction execution. PCLATH
is not modified when the stack is PUSHed or POPed.
After the stack has been PUSHed eight times, the ninth push overwrites the value that was stored
from the first push. The tenth push overwrites the second push (and so on). An example of the
overwriting of the stack is shown in
Figure 6-3: Stack Modification
Note:
Note 1: There are no status bits to indicate stack overflow or stack underflow conditions.
Note 2: There are no instructions/mnemonics called PUSH or POP. These are actions that
Any write to the Program Counter (PCL), will cause the lower five bits of the PCLATH
to be loaded into PCH.
occur from the execution of the CALL, RETURN, RETLW, and RETFIE instructions,
or the vectoring to an interrupt address.
Push1 Push9
Push2 Push10
Push3
Push4
Push5
Push6
Push7
Push8
STACK
Figure
6-3.
Top of STACK
1997 Microchip Technology Inc.
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