PIC12C671-10/SM Microchip Technology, PIC12C671-10/SM Datasheet - Page 177
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PIC12C671-10/SM
Manufacturer Part Number
PIC12C671-10/SM
Description
IC MCU OTP 1KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C671-10/SM
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
AC164312 - MODULE SKT FOR PM3 16SOICISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C671-10/SMR
PIC12C671-10/SMR
PIC12C671-10/SMR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12C671-10/SM
Manufacturer:
Microchip Technology
Quantity:
135
- Current page: 177 of 688
- Download datasheet (3Mb)
11.6.2
1997 Microchip Technology Inc.
Initialization
Since Timer0 has a software programmable clock source, there are two examples to show the
initialization of Timer0 with each source.
clock source (timer mode), while
source (counter mode).
Example 11-3: Timer0 Initialization (Internal Clock Source)
Example 11-4: Timer0 Initialization (External Clock Source)
;**
;**
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
;** BSF
;** BSF
;
; The TMR0 interrupt is disabled, do polling on the overflow bit
;
T0_OVFL_WAIT
; Timer has overflowed
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BTFSS
GOTO
CLRF
CLRF
BSF
MOVLW
MOVWF
BCF
BSF
BSF
BTFSS
GOTO
TMR0
INTCON
STATUS, RP0
0x37
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
TMR0
INTCON
STATUS, RP0
0xC3
OPTION_REG
STATUS, RP0
INTCON, T0IE
INTCON, GIE
INTCON, T0IF
T0_OVFL_WAIT
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are enabled,
;
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Example 11-4
; Clear Timer0 register
; Disable interrupts and clear T0IF
; Bank1
; PortB pull-ups are disabled,
;
;
;
; Bank0
; Enable TMR0 interrupt
; Enable all interrupts
Interrupt on falling edge of RB0
Timer0 increment from external clock
on the high-to-low transition of T0CKI
with a prescaler of 1:256.
Interrupt on rising edge of RB0
Timer0 increment from internal clock
with a prescaler of 1:16.
Example 11-3
Section 11. Timer0
shows the initialization for the external clock
shows the initialization for the internal
DS31011A-page 11-9
11
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