PIC16LF627A-I/ML Microchip Technology, PIC16LF627A-I/ML Datasheet - Page 53
![IC MCU FLASH 1KX14 EEPROM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF627A-I/ML
Manufacturer Part Number
PIC16LF627A-I/ML
Description
IC MCU FLASH 1KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF627A-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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7.4
A crystal oscillator circuit is built in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). It will
continue to run during Sleep. It is primarily intended for
a 32.768 kHz watch crystal. Table 7-1 shows the
capacitor selection for the Timer1 oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
TABLE 7-1:
TABLE 7-2:
© 2009 Microchip Technology Inc.
Legend:
10Bh, 18Bh
0Bh, 8Bh,
Address
Note:
32.768 kHz
0Ch
8Ch
0Eh
0Fh
10h
Freq
Timer1 Oscillator
These values are for design guidance only.
Consult Application Note AN826 “Crystal
Oscillator Basics and Crystal Selection for
rfPIC
further information on Crystal/Capacitor
Selection.
INTCON
TMR1H
TMR1L
T1CON
Name
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by the Timer1 module.
PIR1
PIE1
®
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
and PIC
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
Bit 7
EEIF
EEIE
GIE
—
15 pF
C1
®
Devices” (DS00826) for
CMIF
CMIE
PEIE
Bit 6
—
T1CKPS1
RCIF
RCIE
Bit 5
T0IE
15 pF
C2
T1CKPS0
INTE
Bit 4
TXIF
TXIE
PIC16F627A/628A/648A
T1OSCEN
RBIE
Bit 3
—
—
7.5
If the CCP1 module is configured in Compare mode to
generate a “special event trigger” (CCP1M<3:0> =
1011), this signal will reset Timer1.
Timer1 must be configured for either timer or
Synchronized Counter mode to take advantage of this
feature. If Timer1 is running in Asynchronous Counter
mode, this Reset operation may not work.
In the event that a write to Timer1 coincides with a
special event trigger from CCP1, the write will take
precedence.
In this mode of operation, the CCPRxH:CCPRxL
register pair effectively becomes the period register for
Timer1.
7.6
TMR1H and TMR1L registers are not reset to 00h on
a POR or any other Reset except by the CCP1 special
event triggers (see Section 9.2.4 “Special Event
Trigger”).
T1CON register is reset to 00h on a Power-on Reset or
a Brown-out Reset, which shuts off the timer and
leaves a 1:1 prescale. In all other Resets, the register
is unaffected.
7.7
The prescaler counter is cleared on writes to the
TMR1H or TMR1L registers.
Note:
T1SYNC
CCP1IF
CCP1IE
Bit 2
T0IF
Resetting Timer1 Using a CCP
Trigger Output
Resetting Timer1 Register Pair
(TMR1H, TMR1L)
Timer1 Prescaler
The special event triggers from the CCP1
module will not set interrupt flag bit
TMR1IF (PIR1<0>).
TMR1CS
TMR2IF
TMR2IE
Bit 1
INTF
TMR1ON
TMR1IF
TMR1IE
RBIF
Bit 0
0000 000x
0000 -000
0000 -000
xxxx xxxx
xxxx xxxx
--00 0000
Value on
POR
DS40044G-page 53
0000 000u
0000 -000
0000 -000
uuuu uuuu
uuuu uuuu
--uu uuuu
Value on
all other
Resets
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