ATTINY44-15SSZ Atmel, ATTINY44-15SSZ Datasheet - Page 86

• Manufacturer Part Number: ATTINY44-15SSZ
• Description: IC MCU AVR 4K FLASH 15MHZ 14SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY44-15SSZ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / Rohs Status: Details
• Other names: Q3447517

86
Atmel ATtiny24/44/84 [Preliminary]
Note:
Table 13-4
correct PWM mode.
Table 13-7.
Note:
• Bits 3, 2 – Res: Reserved Bits
These bits are reserved bits in the ATtiny24/44/84 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used, see
by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC)
mode, and two types of Pulse Width Modulation (PWM) modes (see
page
Table 13-8.
Note:
Mode
COM0A1
0
1
2
3
4
5
6
7
77).
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. MAX = 0xFF
WGM2
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 78
pare Match is ignored, but the set or clear is done at TOP. See
on page 80
BOTTOM = 0x00
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase
0
0
0
0
1
1
1
1
Compare Output Mode, Phase Correct PWM Mode
Waveform Generation Mode Bit Description
COM0A0
for more details.
WGM1
0
1
0
1
for more details.
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
WGM0
0
1
0
1
0
1
0
1
Table 13-8 on page
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
OCRA
OCRA
OCRA
86. Modes of operation supported
0xFF
0xFF
0xFF
TOP
–
–
(1)
“Phase Correct PWM Mode”
Immediate
Immediate
Update of
BOTTOM
BOTTOM
“Modes of Operation” on
OCRx at
TOP
TOP
–
–
“Fast PWM Mode” on
7701E–AVR–02/11
TOV Flag
BOTTOM
BOTTOM
Set on
MAX
MAX
MAX
TOP
–
–
(1)