ATTINY861-20SU Atmel, ATTINY861-20SU Datasheet - Page 171

• Manufacturer Part Number: ATTINY861-20SU
• Description: IC MCU AVR 8K FLASH 20MHZ 20SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY861-20SU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SOIC (7.5mm Width)
• Cpu Family: ATtiny
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: USI
• Total Internal Ram Size: 512Byte
• # I/os (max): 16
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 11-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Package Type: SOIC
• Processor Series: ATTINY8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.2
2588E–AVR–08/10
Fuse Bytes
The ATtiny261/461/861 have three fuse bytes.
briefly the functionality of all the fuses and how they are mapped into the fuse bytes. Note that
the fuses are read as logical zero, “0”, if they are programmed.
Table 18-3.
Notes:
Table 18-4.
Notes:
SELFPRGEN
Fuse High Byte
RSTDISBL
DWEN
SPIEN
WDTON
EESAVE
BODLEVEL2
BODLEVEL1
BODLEVEL0
Fuse High Byte
(3))
1. Enables SPM instruction. See
(2)
1. See
2. DWEN must be unprogrammed when Lock Bit security is required.
3. The SPIEN Fuse is not accessible in SPI programming mode.
4. Programming this fues will disable the Watchdog Timer Interrupt. See
5. See
(4)
Fuses. After programming the RSTDISBL fuse, parallel programming must be used to change
fuses and allow further programming.
Memory Lock Bits” on page 170.
Timer Control Register” on page 47
(1)
(5)
(5)
(5)
(1)
Fuse Extended Byte
Fuse High Byte
“Alternate Functions of Port B” on page 66
Table 19-6 on page 191
Bit No
Bit No
7
6
5
4
3
2
1
0
7
6
6
4
3
2
1
0
Description
-
-
-
-
-
-
-
Self-Programming Enable
Description
External Reset disable
DebugWIRE Enable
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
for BODLEVEL Fuse decoding.
“Self-Programming the Flash” on page
for details.
Table
18-3,
for description of RSTDISBL and DWEN
Table 18-4
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Default Value
1 (unprogrammed)
1 (unprogrammed)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM
not preserved)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
and
See “Program And Data
165.
“WDTCR – Watchdog
Table 18-5
describe
171