PIC18F45K20-I/P Microchip Technology, PIC18F45K20-I/P Datasheet

IC PIC MCU FLASH 16KX16 40DIP

PIC18F45K20-I/P

Manufacturer Part Number
PIC18F45K20-I/P
Description
IC PIC MCU FLASH 16KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-I/P

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
CCP/ECCP/EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
64 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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The PIC18F24K20/25K20/44K20/45K20 family devices
that you have received conform functionally to the
current Device Data Sheet (DS41303G), except for the
anomalies described in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the PIC18F24K20/25K20/44K20/
45K20 silicon.
Data Sheet clarifications and corrections start on page
11, following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
 2010 Microchip Technology Inc.
PIC18F24K20
PIC18F25K20
PIC18F44K20
PIC18F45K20
Note 1:
Note 1: This document summarizes all silicon
2:
3:
2: Shaded areas in Table 1 and Table 2 are
Part Number
The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration
memory space. They are shown in hexadecimal in the format “DEVID:DEVREV”.
Refer to the “PIC18F2XK20/4XK20 Flash Memory Programming Specification” (DS41297) for detailed
information on Device and Revision IDs for your specific device.
Shaded cells in this table indicate older device revisions that are no longer in production.
errata issues from all specified revisions
of silicon.
for older device revisions that are no
longer in production.
SILICON DEVREV VALUES
Silicon Errata and Data Sheet Clarification
PIC18F24K20/25K20/44K20/45K20
®
IDE and Microchip’s
Device ID
PIC18F24K20/25K20/44K20/45K20
105h
103h
104h
102h
(1)
(11-bit)
0xA
0xA
0xA
0xA
A4
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1.
2.
3.
4.
The DEVREV values for the various PIC18F24K20/
25K20/44K20/45K20 silicon revisions are shown in
Table 1.
Revision ID for Silicon Revision
0xC
0xC
0xC
0xC
Note:
A7
Using the appropriate interface, connect the
device to the MPLAB ICD 2 programmer/
debugger or PICkit™ 3.
From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
Select
(Debugger>Select Tool).
Perform a “Connect” operation to the device
(Debugger>Connect).
development tool used, the part number and
Device Revision ID value appear in the Output
window.
0xE
0xE
0xE
0xE
A9
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
the
0x11
0x11
0x11
0x11
AB
MPLAB
0x16
0x16
0x16
0x16
A4
Depending
0x18
0x18
0x18
0x18
A7
hardware
(2)
DS80425G-page 1
(5-bit)
0x19
0x19
0x19
0x19
A8
on
0x1B
0x1B
0x1B
0x1B
tool
the
AE

Related parts for PIC18F45K20-I/P

PIC18F45K20-I/P Summary of contents

Page 1

... Part Number Device ID PIC18F24K20 PIC18F25K20 PIC18F44K20 PIC18F45K20 Note 1: The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration memory space. They are shown in hexadecimal in the format “DEVID:DEVREV”. 2: Refer to the “PIC18F2XK20/4XK20 Flash Memory Programming Specification” (DS41297) for detailed information on Device and Revision IDs for your specific device ...

Page 2

... Unexpected code execution at low 19. Premature POR release. 20. POR may become stuck. 21. 48 MHz maximum frequency. 22. Presetting interrupt-on-change issue. 23. Endurance is limited to 10K cycles. 24. Endurance is limited to 1K cycles. 25. HFOFST bit erases to ‘0’ instead of ‘1’. (1) Affected Revisions  2010 Microchip Technology Inc. ...

Page 3

... PORTB Interrupts Interrupt-on- Change Note 1: Only those issues indicated in the last column apply to the current silicon revision. 2: Shaded cells in this table indicate older device revisions that are no longer in production.  2010 Microchip Technology Inc. Item Issue Summary 26. RCIDL bit may stay low improperly. ...

Page 4

... If only the SSPOV bit is set (BF flag was cleared) and a matching address is clocked in, that received byte will be improperly loaded into the SSPBUF register and an ACK will be improperly generated. Work around None. Affected Silicon Revisions  2010 Microchip Technology Inc time-dependent ...

Page 5

... Affected Silicon Revisions  2010 Microchip Technology Inc. 11. Module: EUSART In Synchronous Master mode, when the SPBRG is set to an odd number, the duty cycle of the CK output will be skewed by one baud clock count. Work around High values of SPBRG will minimize the effect of this anomaly ...

Page 6

... Module: POR/BOR The POR rearm voltage may be below the low end of the BOR range, causing unexpected code execution below the BOR range. Work around Use external power monitor to hold the device in Reset below 1.1V. Affected Silicon Revisions  2010 Microchip Technology Inc. ...

Page 7

... Divide external clock by 4 and use HS-PLL Clock mode for external clocking above 48 MHz. Affected Silicon Revisions X X  2010 Microchip Technology Inc. 22. Module: Comparators When the CxON bit is clear, the output from the comparator will be properly forced to zero, but the DD CxPOL bit will improperly have no effect on the CxOUT bit ...

Page 8

... ECCP – In Full-Bridge mode when PR2 = CCPR1L and DC1B[1:0] <>‘00’ and the direction is changed, then the dead time before the modu- lated output starts is compromised. The modulated = 1.8V. The time DD DD increases TMR2 Prescale OSC * TMR2 Prescale as specified  2010 Microchip Technology Inc. ...

Page 9

... In SPI Master mode, if the SSPBUF register is written while a byte is actively being transmitted, an extra clock pulse will be improperly generated at the end of the transmission. Further writes to the  2010 Microchip Technology Inc. SSPBUF register will be inhibited although TMR2 clock pulses will be generated for each attempted OSC write ...

Page 10

... X 2. Store the state of the PORTB inputs before entering Sleep. Upon waking RBIF is detected, then compare the PORTB levels with those stored. If they are the same, then clear and ignore the RBIF interrupt. Affected Silicon Revisions  2010 Microchip Technology Inc. ...

Page 11

... PIC18F24K20/25K20/44K20/45K20 Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS41303G): None.  2010 Microchip Technology Inc. DS80425G-page 11 ...

Page 12

... Updated to include early revisions of silicon, revision IDs 0xA through 0x11. These early revisions were described in DS80366 errata, which is now obsolete. Rev F Document (05/2010) Updated Table 1. Rev G Document (07/2010) Removed ADC Work around #2 and changed # (Module 28). DS80425G-page 12  2010 Microchip Technology Inc. ...

Page 13

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 14

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350  2010 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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