PIC16LF872T-I/SS Microchip Technology, PIC16LF872T-I/SS Datasheet - Page 35
![IC MCU FLASH 2KX14 EE A/D 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16LF872T-I/SS
Manufacturer Part Number
PIC16LF872T-I/SS
Description
IC MCU FLASH 2KX14 EE A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16C770-ISO.pdf
(8 pages)
2.PIC16F872-ISO.pdf
(168 pages)
3.PIC16F872-ISO.pdf
(5 pages)
4.PIC16F872-ISO.pdf
(6 pages)
Specifications of PIC16LF872T-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16C770-ISO PDF datasheet
- PIC16F872-ISO PDF datasheet #2
- PIC16F872-ISO PDF datasheet #3
- PIC16F872-ISO PDF datasheet #4
- Current page: 35 of 168
- Download datasheet (3Mb)
4.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= ‘1’) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= ‘0’) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 4-5). PORTC pins have Schmitt Trigger input
buffers.
When the I
can be configured with normal I
levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
the destination should be avoided. The user should
refer to the corresponding peripheral section for the
correct TRIS bit settings.
FIGURE 4-5:
© 2006 Microchip Technology Inc.
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
PORT
WR
TRIS
RD
TRIS
Peripheral
OE
RD
PORT
Peripheral Input
Note 1:
(3)
2:
3:
PORTC and the TRISC Register
2
I/O pins have diode protection to V
Port/Peripheral select signal selects between port
data and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
C module is enabled, the PORTC (4:3) pins
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
(2)
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>
RC<7:5>
0
1
Q
2
C levels or with SMBus
EN
D
Schmitt
Trigger
DD
and V
V
V
N
P
SS
DD
SS
I/O pin
.
(1)
FIGURE 4-6:
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
PORT
WR
TRIS
RD
TRIS
Peripheral
OE
RD
PORT
SSPl Input
Note 1:
(3)
2:
3:
I/O pins have diode protection to V
Port/Peripheral select signal selects between port data
and peripheral output.
Peripheral OE (output enable) is only activated if
peripheral select is active.
Data Latch
TRIS Latch
D
D
CK
CK
(2)
Q
Q
Q
Q
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
0
1
PIC16F872
Q
SSPSTAT<6>
CKE
EN
D
Schmitt
Trigger
DS30221C-page 33
DD
and V
Vss
0
1
V
P
N
DD
SS
Schmitt
Trigger
with
SMBus
Levels
.
pin
I/O
(1)
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