PIC18LF25K22-I/SP Microchip Technology, PIC18LF25K22-I/SP Datasheet - Page 135
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PIC18LF25K22-I/SP
Manufacturer Part Number
PIC18LF25K22-I/SP
Description
MCU 8BIT 32KB FLASH 3.6V 28SDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18F26J13-ISS.pdf
(496 pages)
2.PIC18F25K22T-ISS.pdf
(10 pages)
3.PIC18F25K22-ISP.pdf
(492 pages)
Specifications of PIC18LF25K22-I/SP
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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TABLE 10-1:
TABLE 10-2:
TABLE 10-3:
2010 Microchip Technology Inc.
RA6/CLKO/OSC2
RA7/CLKI/OSC1
Legend:
ANSELA
CM1CON0
CM2CON0
VREFCON1
VREFCON2
HLVDCON
PORTA
SLRCON
SRCON0
SSP1CON1
T0CON
TRISA
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.
CONFIG1H
Legend: — = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTA.
Name
Name
Pin Name
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS
= CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
I
2
C.
VDIRMAG
TMR0ON
IESO
DACEN
TRISA7
Bit 7
SRLEN
WCOL
C1ON
C2ON
PORTA I/O SUMMARY (CONTINUED)
CONFIGURATION REGISTERS ASSOCIATED WITH PORTA
Bit 7
RA7
—
—
—
REGISTERS ASSOCIATED WITH PORTA
Function
CLKO
OSC2
OSC1
CLKI
RA6
RA7
FCMEN
Bit 6
DACLPS DACOE
C1OUT
C2OUT
BGVST
SSPOV
TRISA6
T08BIT
Bit 6
RA6
Setting
—
—
—
TRIS
0
1
x
x
0
1
x
x
PRICLKEN PLLCFG
SRCLK<2:0>
ANSEL
Setting
SSPEN
TRISA5
ANSA5
Bit 5
IRVST
C1OE
C2OE
T0CS
Bit 5
RA5
—
—
1
0
1
x
1
0
1
x
Type
Pin
HLVDEN
O
O
O
O
TRISA4
Preliminary
C1POL
C2POL
I
I
I
I
SLRE
T0SE
Bit 4
CKP
Bit 4
RA4
—
—
Buffer
XTAL
XTAL
Type
DIG
TTL
DIG
DIG
TTL
AN
SRQEN
TRISA3
ANSA3
SLRD
C1SP
C2SP
Bit 3
PSA
Bit 3
RA3
LATA<6> data output; enabled in INTOSC modes when
CLKO is not enabled.
PORTA<6> data input; enabled in INTOSC modes when
CLKO is not enabled.
In RC mode, OSC2 pin outputs CLKOUT which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
Oscillator crystal output; connects to crystal or resonator in
Crystal Oscillator mode.
LATA<7> data output; disabled in external oscillator modes.
PORTA<7> data input; disabled in external oscillator
modes.
External clock source input; always associated with pin
function OSC1.
Oscillator crystal input or external clock source input ST
buffer when configured in RC mode; CMOS otherwise.
DACPSS<1:0>
PIC18(L)F2X/4XK22
DACR<4:0>
SRNQEN
TRISA2
ANSA2
SLRC
Bit 2
C1R
C2R
Bit 2
RA2
HLVDL<3:0>
SSPM<3:0>
FOSC<3:0>
T0PS<2:0>
Description
TRISA1
ANSA1
2
SLRB
SRPS
C
Bit 1
RA1
Bit 1
TM
—
C1CH<1:0>
C2CH<1:0>
=
Schmitt Trigger input with
DACNSS
TRISA0
ANSA0
SRPR
SLRA
Bit 0
Bit 0
RA0
DS41412B-page 135
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