DSPIC30F2010-20E/SP Microchip Technology, DSPIC30F2010-20E/SP Datasheet - Page 194

• Manufacturer Part Number: DSPIC30F2010-20E/SP
• Description: IC DSPIC MCU/DSP 12K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20E/SP

• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F2010
Dead-Time Generators ....................................................... 86
Development Support ....................................................... 145
Device Configuration
Device Configuration Registers......................................... 134
Device Overview ................................................................... 5
Divide Support..................................................................... 12
DSP Engine......................................................................... 13
Dual Output Compare Match Mode .................................... 72
E
Edge-Aligned PWM............................................................. 85
Electrical Characteristics................................................... 149
Equations
Errata .................................................................................... 4
Exception Sequence
External Clock Timing Characteristics
External Clock Timing Requirements................................ 158
External Interrupt Requests ................................................ 41
F
Fast Context Saving............................................................ 41
Firmware Instructions........................................................ 137
Flash Program Memory....................................................... 43
I
I/O Pin Specifications
I/O Ports .............................................................................. 53
I
I
I
DS70118G-page 192
2
2
2
C ....................................................................................... 95
C 10-bit Slave Mode Operation ........................................ 97
C 7-bit Slave Mode Operation .......................................... 97
Ranges........................................................................ 86
Register Map............................................................. 135
FBORPOR ................................................................ 134
FGS........................................................................... 134
FOSC ........................................................................ 134
FWDT........................................................................ 134
Multiplier...................................................................... 15
Continuous Pulse Mode .............................................. 72
Single Pulse Mode ...................................................... 72
AC ............................................................................. 157
DC ............................................................................. 149
A/D Conversion Clock ............................................... 113
Baud Rate ................................................................. 107
PWM Period ................................................................ 84
PWM Period (Up/Down Count Mode) ......................... 84
PWM Resolution ......................................................... 84
Serial Clock Rate ...................................................... 100
Trap Sources .............................................................. 39
Type A and B Timer .................................................. 165
Type A Timer ............................................................ 165
Type B Timer ............................................................ 166
Type C Timer ............................................................ 166
In-Circuit Serial Programming (ICSP) ......................... 43
Run-Time Self-Programming (RTSP) ......................... 43
Table Instruction Operation Summary ........................ 43
Input .......................................................................... 153
Output ....................................................................... 155
Parallel I/O (PIO)......................................................... 53
Reception .................................................................... 98
Transmission............................................................... 98
Reception .................................................................... 97
Transmission............................................................... 97
I
I
Idle Current (I
In-Circuit Serial Programming (ICSP)............................... 123
Independent PWM Output .................................................. 87
Initialization Condition for RCON Register Case 1 ........... 132
Initialization Condition for RCON Register Case 2 ........... 132
Initialization Condition for RCON Register, Case 1 .......... 132
Input Capture (CAPx) Timing Characteristics................... 168
Input Capture Interrupts...................................................... 69
Input Capture Module ......................................................... 67
Input Capture Timing Requirements................................. 168
Input Change Notification Module....................................... 54
Input Characteristics
Instruction Addressing Modes ............................................ 31
Instruction Set................................................................... 137
Inter-Integrated Circuit. See I
Internal Clock Timing Examples ....................................... 160
Internet Address ............................................................... 199
2
2
C Master Mode
C Module
Baud Rate Generator ............................................... 100
Clock Arbitration ....................................................... 100
Multi-Master Communication, Bus Collision and
Reception ................................................................. 100
Transmission ............................................................ 100
Addresses................................................................... 97
Bus Data Timing Characteristics
Bus Data Timing Requirements
Bus Start/Stop Bits Timing Characteristics
General Call Address Support .................................... 99
Interrupts .................................................................... 99
IPMI Support............................................................... 99
Master Operation ........................................................ 99
Master Support ........................................................... 99
Operating Function Description .................................. 95
Operation During CPU Sleep and Idle Modes .......... 101
Pin Configuration ........................................................ 95
Programmer’s Model .................................................. 95
Register Map ............................................................ 102
Registers .................................................................... 95
Slope Control .............................................................. 99
Software Controlled Clock Stretching (STREN = 1) ... 99
Various Modes............................................................ 95
Register Map .............................................................. 70
In CPU Sleep Mode .................................................... 69
Simple Capture Event Mode....................................... 68
Register Map (bits 15-0) ............................................. 55
QEA/QEB ................................................................. 171
File Register Instructions ............................................ 31
Fundamental Modes Supported ................................. 31
MAC Instructions ........................................................ 32
MCU Instructions ........................................................ 32
Move and Accumulator Instructions............................ 32
Other Instructions ....................................................... 32
Bus Arbitration .................................................. 100
Master Mode..................................................... 178
Slave Mode....................................................... 180
Master Mode..................................................... 179
Slave Mode....................................................... 181
Master Mode..................................................... 178
Slave Mode....................................................... 180
IDLE
) ............................................................ 152
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