PIC18F87J11T-I/PT Microchip Technology, PIC18F87J11T-I/PT Datasheet - Page 13

• Manufacturer Part Number: PIC18F87J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 15x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 68
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J11T-I/PTTR

3.2.1
The previous programming example assumed that the
device had been Bulk Erased prior to programming.
There may be situations where the user wishes to
modify a section of memory in an already programmed
device. Doing this is simply an extension of the three
basic operations: read, erase and write.
Before a Bulk Erase is performed on the device, the
entire code memory is read back (as described in
Section 4.2 “Verify Code Memory and Configuration
Word”) and buffered. It is at this point that the required
changes are made on the buffered program. The device
is then erased and reprogrammed with the corrected
code. An overview of the process is shown in Table 3-3.
TABLE 3-3:
© 2006 Microchip Technology Inc.
Step 1: Direct access to code memory.
Step 2: Read and modify code memory (see Section 4.1 “Read Code Memory”).
Step 3: Perform a Bulk Erase (see Section 3.1.1 “ICSP Bulk Erase”).
Step 4: Enable memory writes.
Step 5: Load write buffer. The correct bytes will be selected based on the Table Pointer.
To continue modifying data, repeat Step 5, where the Address Pointer is incremented by the appropriate number of bytes at each
iteration of the loop. The write cycle must be repeated enough times to completely rewrite the contents of the program memory.
Step 7: Disable writes.
Command
0000
0000
0000
0000
0000
0000
0000
1101
1111
0000
0000
4-Bit
.
.
.
MODIFYING CODE MEMORY
84 A6
0E <Addr[21:16]>
6E F8
0E <Addr[8:15]>
6E F7
0E <Addr[7:0]>
6E F6
<MSB><LSB>
<MSB><LSB>
00 00
94 A6
MODIFYING CODE MEMORY
Data Payload
.
.
.
BSF
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
Write 2 bytes and post-increment address by 2.
Repeat as many times as necessary to fill the write buffer.
Write 2 bytes and start programming.
NOP - hold PGC high for time P9 and low for time P10.
BCF
EECON1, WREN
<Addr[21:16]>
TBLPTRU
<Addr[8:15]>
TBLPTRH
<Addr[7:0]>
TBLPTRL
EECON1, WREN
PIC18F6XJXX/8XJXX
3.2.2
Since the Flash Configuration Words are stored in
program memory, they are programmed as if they were
program data. Refer to Section 3.2 “Code Memory
Programming” and Section 3.2.1 “Modifying Code
Memory” for methods and examples on programming
or modifying program memory. See also Section 5.0
“Configuration Word” for additional information on
the Configuration Words.
Core Instruction
CONFIGURATION WORD
PROGRAMMING
DS39644E-page 13