ATXMEGA16A4-CUR Atmel, ATXMEGA16A4-CUR Datasheet - Page 40

• Manufacturer Part Number: ATXMEGA16A4-CUR
• Description: MCU AVR 16+4KB FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24. Crypto Engine
24.1
24.2
8069Q–AVR–12/10
Features
Overview
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The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two com-
monly used encryption standards. These are supported through an AES peripheral module and
a DES CPU instruction. All communication interfaces and the CPU can optionally use AES and
DES encrypted communication and data storage.
DES is supported by a DES instruction in the AVR XMEGA CPU. The 8-byte key and 8-byte
data blocks must be loaded into the Register file, and then DES must be executed 16 times to
encrypt/decrypt the data block.
The AES Crypto Module encrypts and decrypts 128-bit data blocks with the use of a 128-bit key.
The key and data must be loaded into the key and state memory in the module before encryp-
tion/decryption is started. It takes 375 peripheral clock cycles before the encryption/decryption is
done and decrypted/encrypted data can be read out, and an optional interrupt can be generated.
The AES Crypto Module also has DMA support with transfer triggers when encryption/decryp-
tion is done and optional auto-start of encryption/decryption when the state memory is fully
loaded.
Data Encryption Standard (DES) CPU instruction
Advanced Encryption Standard (AES) Crypto module
DES Instruction
AES Crypto Module
– Encryption and Decryption
– Single-cycle DES instruction
– Encryption/Decryption in 16 clock cycles per 8-byte block
– Encryption and Decryption
– Support 128-bit keys
– Support XOR data load mode to the State memory for Cipher Block Chaining
– Encryption/Decryption in 375 clock cycles per 16-byte block
XMEGA A4
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