PIC16LC72A-04I/ML Microchip Technology, PIC16LC72A-04I/ML Datasheet - Page 18
![IC MCU OTP 2KX14 A/D PWM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LC72A-04I/ML
Manufacturer Part Number
PIC16LC72A-04I/ML
Description
IC MCU OTP 2KX14 A/D PWM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC72A-04I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
22
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC16LC72A04I/ML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC72A-04I/ML
Manufacturer:
Microchip Technology
Quantity:
135
PIC16C62B/72A
2.5
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer ).
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
FIGURE 2-3:
DS35008B-page 18
RP1:RP0
bank select
(1)
Note 1: Maintain clear for upward compatibility with future products.
Indirect Addressing, INDF and FSR
Registers
2: Not implemented.
location select
6
Direct Addressing
DIRECT/INDIRECT ADDRESSING
Data
Memory
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
Preliminary
100h
17Fh
Bank 2
10
(2)
not used
EXAMPLE 2-1:
NEXT
CONTINUE
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-3. However, IRP is not used in the
PIC16C62B/72A.
180h
1FFh
Bank 3
11
(2)
IRP
movlw
movwf
clrf
incf
btfss
goto
:
(1)
bank select
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
0x20
FSR
INDF
FSR
FSR,4 ;all done?
NEXT
7
Indirect Addressing
1999 Microchip Technology Inc.
;initialize pointer
;
;clear INDF register
;inc pointer
;NO, clear next
;YES, continue
FSR register
to RAM
location select
0