PIC18LF2221-I/SP Microchip Technology, PIC18LF2221-I/SP Datasheet - Page 266
![IC PIC MCU FLASH 2KX16 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2221-I/SP
Manufacturer Part Number
PIC18LF2221-I/SP
Description
IC PIC MCU FLASH 2KX16 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2221-I/SP
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 266 of 394
- Download datasheet (7Mb)
PIC18F4321 FAMILY
REGISTER 23-14: WDTCON: WATCHDOG TIMER CONTROL REGISTER
TABLE 23-2:
DS39689A-page 264
RCON
WDTCON
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Watchdog Timer.
Note 1:
Name
The SBOREN bit is only available when the BOREN1:BOREN0 configuration bits = 01; otherwise, it is
disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset (BOR)”.
bit 7-1
bit 0
IPEN
Bit 7
—
SUMMARY OF WATCHDOG TIMER REGISTERS
Unimplemented: Read as ‘0’
SWDTEN: Software Controlled Watchdog Timer Enable bit
1 = Watchdog Timer is on
0 = Watchdog Timer is off
bit 7
Legend:
R = Readable bit
U = Unimplemented bit, read as ‘0’
SBOREN
Note 1: This bit has no effect if the configuration bit, WDTEN, is enabled.
U-0
—
Bit 6
—
(1)
U-0
—
Bit 5
—
—
Advance Information
U-0
—
Bit 4
RI
—
U-0
—
Bit 3
TO
—
W = Writable bit
-n = Value at POR
U-0
—
Bit 2
PD
—
(1)
U-0
Bit 1
POR
—
—
© 2005 Microchip Technology Inc.
SWDTEN
U-0
—
Bit 0
BOR
SWDTEN
R/W-0
on page
Values
Reset
50
50
bit 0
(1)
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