PIC18F2331-E/SP Microchip Technology, PIC18F2331-E/SP Datasheet - Page 45

• Manufacturer Part Number: PIC18F2331-E/SP
• Description: IC MCU FLASH 4KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2331-E/SP

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Controller Family/series: PIC18
• No. Of I/o's: 24
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3-DB18F4431 - BOARD DAUGHTER ICEPIC3AC164035 - MODULE SKT FOR 18F2X31 28SOICDVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 3-3:
© 2007 Microchip Technology Inc.
Primary System
Clock
(PRI_IDLE mode)
T1OSC or
INTRC
INTOSC
Sleep mode
Note 1:
Power- Managed
Clock in
Mode
2:
3:
4:
5:
(1)
(2)
In this instance, refers specifically to the INTRC clock source.
Includes both the INTOSC 8 MHz source and postscaler derived frequencies.
Two-Speed Start-up is covered in greater detail in Section 22.3 “Two-Speed Start-up”.
Execution continues during the INTOSC stabilization period.
Required delay when waking from Sleep and all Idle modes. This delay runs concurrently with any other
required delays (see Section 3.3 “Idle Modes”).
ACTIVITY AND EXIT DELAY ON WAKE FROM SLEEP MODE OR ANY IDLE MODE
(BY CLOCK SOURCES)
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
LP, XT, HS
HSPLL
EC, RC, INTRC
INTOSC
Primary System
Clock
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
Power- Managed
Mode Exit Delay
OST + 2 ms
OST + 2 ms
OST + 2 ms
5-10 μs
5-10 μs
5-10 μs
5-10 μs
1 ms
1 ms
None
OST
OST
OST
PIC18F2331/2431/4331/4431
(4)
(4)
(5)
(5)
(5)
(5)
Preliminary
Clock Ready
(OSCCON)
Status bit
OSTS
OSTS
OSTS
OSTS
IOFS
IOFS
IOFS
IOFS
—
—
—
—
CPU and peripherals
clocked by primary
clock and executing
instructions.
CPU and peripherals
clocked by selected
power-managed mode
clock and executing
instructions until
primary clock source
becomes ready.
Not clocked or
Two-Speed Start-up (if
enabled) until primary
clock source becomes
ready
Exit by Interrupt
(3)
.
Activity During Wake from
Power-Managed Mode
Not clocked or
Two-Speed Start-up
(if enabled).
Exit by Reset
DS39616C-page 43
(3)