PIC18F2431-E/SO Microchip Technology, PIC18F2431-E/SO Datasheet - Page 267

IC MCU FLASH 8KX16 28SOIC

PIC18F2431-E/SO

Manufacturer Part Number
PIC18F2431-E/SO
Description
IC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2431-E/SO

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
I3-DB18F4431 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
21.1
The Low-Voltage Detect Control register controls the
operation of the Low-Voltage Detect circuitry.
REGISTER 21-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
Note 1:
U-0
Control Register
LVDL3:LVDL0 modes which result in a trip point below the valid operating voltage of the device are not
tested.
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the Low-Voltage Detect logic will generate the interrupt flag at the specified voltage
0 = Indicates that the Low-Voltage Detect logic will not generate the interrupt flag at the specified
LVDEN: Low-Voltage Detect Power Enable bit
1 = Enables LVD, powers up LVD circuit
0 = Disables LVD, powers down LVD circuit
LVDL3:LVDL0: Low-Voltage Detection Limit bits
1111 = External analog input is used (input comes from the LVDIN pin)
1110 = Maximum setting
.
.
.
0010 = Minimum setting
0001 = Reserved
0000 = Reserved
range
voltage range and the LVD interrupt should not be enabled
U-0
LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
PIC18F2331/2431/4331/4431
LVDEN
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LVDL3
R/W-0
(1)
(1)
LVDL2
R/W-1
(1)
x = Bit is unknown
LVDL1
R/W-0
(1)
DS39616C-page 265
LVDL0
R/W-1
(1)
bit 0

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