DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 161

IC DSPIC MCU/DSP 12K 28QFN

DSPIC33FJ12MC202-I/ML

Manufacturer Part Number
DSPIC33FJ12MC202-I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
I2C, JTAG, SPI, UART
No. Of I/o's
21
Flash Memory Size
12KB
Supply Voltage Range
3V To 3.6V
Package
28QFN EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
15.0
This section describes the Quadrature Encoder Inter-
face (QEI) module and associated operational modes.
The QEI module provides the interface to incremental
encoders for obtaining mechanical position data.
FIGURE 15-1:
© 2008 Microchip Technology Inc.
Note:
UPDNx
INDXx
QEAx
QEBx
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
This data sheet summarizes the features
of the dsPIC33FJ12MC201/202 family of
devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the dsPIC33F Family
Reference Manual, “Section 15. Quadra-
ture
(DS70208), which is available from the
Microchip website (www.microchip.com).
Synchronize
Sleep Input
Det
PCDOUT
Encoder
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM
Programmable
Programmable
0
1
Programmable
0
1
Digital Filter
Digital Filter
Digital Filter
QEIxCON<11>
Existing Pin Logic
Up/Down
3
Interface
QEIM<2:0>
T
CY
Interface Logic
Quadrature
TQCS
Encoder
1
0
Mode Select
QEIM<2:0>
(QEI)”
Preliminary
To
3
TQGATE
dsPIC33FJ12MC201/202
1
0
2
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate bits, QEIM<2:0> in (QEIxCON<10:8>).
Figure 15-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
Zero Detect
(MAXCNT)
(POSCNT)
TQCKPS<1:0>
Q
Q
1, 8, 64, 256
Prescaler
2
Reset
Equal
DS70265C-page 159
QEIIF
Event
Flag

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