DSPIC33FJ12MC202-I/ML Microchip Technology, DSPIC33FJ12MC202-I/ML Datasheet - Page 277

• Manufacturer Part Number: DSPIC33FJ12MC202-I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC202-I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: I2C, JTAG, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 12KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28QFN EP
• Device Core: dsPIC
• Family Name: dSPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit|6-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Reset
Reset Sequence ................................................................. 63
Resets ................................................................................. 55
© 2008 Microchip Technology Inc.
IFS0 (Interrupt Flag Status 0) ..................................... 72
IFS1 (Interrupt Flag Status 1) ..................................... 74
IFS3 (Interrupt Flag Status 3) ..................................... 75
IFS4 (Interrupt Flag Status 4) ..................................... 76
INTCON1 (Interrupt Control 1).................................... 69
INTCON2 (Interrupt Control 2).................................... 71
INTTREG Interrupt Control and Status Register......... 92
IPC0 (Interrupt Priority Control 0) ............................... 82
IPC1 (Interrupt Priority Control 1) ............................... 83
IPC14 (Interrupt Priority Control 14) ........................... 89
IPC15 (Interrupt Priority Control 15) ........................... 90
IPC16 (Interrupt Priority Control 16) ........................... 90
IPC18 (Interrupt Priority Control 18) ........................... 91
IPC2 (Interrupt Priority Control 2) ............................... 84
IPC3 (Interrupt Priority Control 3) ............................... 85
IPC4 (Interrupt Priority Control 4) ............................... 86
IPC5 (Interrupt Priority Control 5) ............................... 87
IPC7 (Interrupt Priority Control 7) ............................... 88
NVMCON (Flash Memory Control) ............................. 51
NVMKEY (Nonvolatile Memory Key) .......................... 52
OCxCON (Output Compare x Control) ..................... 143
OSCCON (Oscillator Control) ..................................... 98
OSCTUN (FRC Oscillator Tuning) ............................ 101
P1DC3 (PWM Duty Cycle 3)..................................... 157
PLLFBD (PLL Feedback Divisor).............................. 100
PMD1 (Peripheral Module Disable
PMD2 (Peripheral Module Disable
PMD3 (Peripheral Module Disable
PWMxCON1 (PWM Control 1).................................. 151
PWMxCON2 (PWM Control 2).................................. 152
PxDC1 (PWM Duty Cycle 1) ..................................... 157
PxDC2 (PWM Duty Cycle 2) ..................................... 157
PxDTCON1 (Dead-Time Control 1) .......................... 153
PxDTCON2 (Dead-Time Control 2) .......................... 154
PxFLTACON (Fault A Control).................................. 155
PxOVDCON (Override Control) ................................ 156
PxSECMP (Special Event Compare)........................ 150
PxTCON (PWM Time Base Control)......................... 148
PxTMR (PWM Timer Count Value)........................... 149
PxTPER (PWM Time Base Period) .......................... 149
QEICON (QEI Control).............................................. 160
RCON (Reset Control) ................................................ 56
SPIxCON1 (SPIx Control 1)...................................... 165
SPIxCON2 (SPIx Control 2)...................................... 167
SPIxSTAT (SPIx Status and Control) ....................... 164
SR (CPU Status)................................................... 14, 68
T1CON (Timer1 Control)........................................... 132
T2CON Control ......................................................... 136
T3CON Control ......................................................... 137
TCxCON (Input Capture x Control)........................... 140
UxMODE (UARTx Mode).......................................... 178
UxSTA (UARTx Status and Control)......................... 180
Illegal Opcode ....................................................... 55, 61
Trap Conflict................................................................ 61
Uninitialized W Register........................................ 55, 61
Control Register 1)............................................ 105
Control Register 2)............................................ 106
Control Register 3)............................................ 107
Preliminary
dsPIC33FJ12MC201/202
S
Serial Peripheral Interface (SPI) ....................................... 163
Software Reset Instruction (SWR)...................................... 61
Software Simulator (MPLAB SIM) .................................... 214
Software Stack Pointer, Frame Pointer
Special Features of the CPU ............................................ 197
SPI Module
Symbols Used in Opcode Descriptions ............................ 206
System Control
T
Temperature and Voltage Specifications
Timer1 .............................................................................. 131
Timer2/3 ........................................................................... 133
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
CALLL Stack Frame ................................................... 40
SPI1 Register Map ..................................................... 34
Register Map .............................................................. 39
AC............................................................................. 226
CLKO and I/O ........................................................... 229
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
12-bit A/D Conversion (ASAM = 0, SSRC = 000)..... 252
Brown-out Situations .................................................. 60
External Clock .......................................................... 227
I2Cx Bus Data (Master Mode) .................................. 245
I2Cx Bus Data (Slave Mode) .................................... 247
I2Cx Bus Start/Stop Bits (Master Mode)................... 245
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 247
Input Capture (CAPx) ............................................... 235
Motor Control PWM .................................................. 237
Motor Control PWM Fault ......................................... 237
OC/PWM .................................................................. 236
Output Compare (OCx) ............................................ 235
QEA/QEB Input ........................................................ 238
QEI Module Index Pulse........................................... 239
Reset, Watchdog Timer, Oscillator Start-up
SPIx Master Mode (CKE = 0) ................................... 240
SPIx Master Mode (CKE = 1) ................................... 241
SPIx Slave Mode (CKE = 0) ..................................... 242
SPIx Slave Mode (CKE = 1) ..................................... 243
Timer1, 2 and 3 External Clock ................................ 232
TimerQ (QEI Module) External Clock ....................... 234
CLKO and I/O ........................................................... 229
External Clock .......................................................... 227
Input Capture............................................................ 235
10-bit A/D Conversion Requirements ....................... 254
12-bit A/D Conversion Requirements ....................... 252
I2Cx Bus Data Requirements (Master Mode)........... 246
I2Cx Bus Data Requirements (Slave Mode)............. 248
Motor Control PWM Requirements........................... 237
Output Compare Requirements................................ 235
PLL Clock ................................................................. 228
QEI External Clock Requirements............................ 234
QEI Index Pulse Requirements ................................ 239
Quadrature Decoder Requirements ......................... 238
Reset, Watchdog Timer, Oscillator Start-up
= 0, SSRC = 000) ............................................. 253
ASAM = 1, SSRC = 111, SAMC = 00001) ....... 253
Timer and Power-up Timer............................... 230
Timer, Power-up Timer and Brown-out
Reset Requirements......................................... 231
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