PIC24FJ64GB002-I/ML Microchip Technology, PIC24FJ64GB002-I/ML Datasheet - Page 166
![IC MCU 16BIT 64KB FLASH 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24FJ64GB002-I/ML
Manufacturer Part Number
PIC24FJ64GB002-I/ML
Description
IC MCU 16BIT 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.MCP73831T-2DCIOT.pdf
(28 pages)
2.PIC24FJ32GA102-ISP.pdf
(48 pages)
3.PIC24FJ32GB002-ISO.pdf
(352 pages)
4.PIC24FJ32GB002-ISO.pdf
(12 pages)
5.PIC24FJ32GB002-ISO.pdf
(342 pages)
Specifications of PIC24FJ64GB002-I/ML
Program Memory Type
FLASH
Program Memory Size
64KB (22K x 24)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
19
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
19
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Embedded Interface Type
I2C, LIN, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GB002-I/ML
Manufacturer:
ANAREN
Quantity:
5 000
- MCP73831T-2DCIOT PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GB002-ISO PDF datasheet #3
- PIC24FJ32GB002-ISO PDF datasheet #4
- PIC24FJ32GB002-ISO PDF datasheet #5
- Current page: 166 of 352
- Download datasheet (3Mb)
PIC24FJ64GB004 FAMILY
14.4
The DCB bits (OCxCON2<10:9>) provide for resolution
better than one instruction cycle. When used, they
delay the falling edge generated by a match event by a
portion of an instruction cycle.
For example, setting DCB<1:0> = 10 causes the falling
edge to occur half way through the instruction cycle in
which the match event occurs, instead of at the
beginning.
OCM<2:0> = 001. When operating the module in PWM
mode (OCM<2:0> = 110 or 111), the DCB bits will be
double-buffered.
TABLE 14-1:
TABLE 14-2:
DS39940D-page 166
Prescaler Ratio
Period Value
Resolution (bits)
Note 1:
Prescaler Ratio
Period Value
Resolution (bits)
Note 1:
PWM Frequency
PWM Frequency
Subcycle Resolution
Based on F
Based on F
These
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 4 MIPS (F
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 16 MIPS (F
bits
CY
CY
= F
= F
cannot
OSC
OSC
30.5 Hz
FFFFh
/2; Doze mode and PLL are disabled.
FFFFh
/2; Doze mode and PLL are disabled.
7.6 Hz
16
16
8
8
be
used
244 Hz
FFFFh
FFFFh
61 Hz
16
16
1
1
when
Preliminary
122 Hz
488 Hz
7FFFh
7FFFh
15
15
1
1
The DCB bits are intended for use with a clock source
identical to the system clock. When an OCx module
with enabled prescaler is used, the falling edge delay
caused by the DCB bits will be referenced to the
system clock period, rather than the OCx module's
period.
3.9 kHz
977 Hz
0FFFh
0FFFh
12
12
1
1
15.6 kHz
3.9 kHz
03FFh
03FFh
10
10
1
1
2010 Microchip Technology Inc.
31.3 kHz
125 kHz
007Fh
007Fh
CY
1
7
CY
1
7
= 4 MHz)
= 16 MHz)
125 kHz
500 kHz
001Fh
001Fh
(1)
1
5
1
5
(1)
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