PIC18F242-E/SP Microchip Technology, PIC18F242-E/SP Datasheet - Page 100

IC MCU CMOS 40MHZ 8K FLASH 28DIP

PIC18F242-E/SP

Manufacturer Part Number
PIC18F242-E/SP
Description
IC MCU CMOS 40MHZ 8K FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F242-E/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F242-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
PIC18FXX2
REGISTER 9-1:
DS39564C-page 98
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TRISE REGISTER
bit 7
IBF: Input Buffer Full Status bit
1 = A word has been received and waiting to be read by the CPU
0 = No word has been received
OBF: Output Buffer Full Status bit
1 = The output buffer still holds a previously written word
0 = The output buffer has been read
IBOV: Input Buffer Overflow Detect bit (in Microprocessor mode)
1 = A write occurred when a previously input word has not been read
0 = No overflow occurred
PSPMODE: Parallel Slave Port Mode Select bit
1 = Parallel Slave Port mode
0 = General purpose I/O mode
Unimplemented: Read as '0'
TRISE2: RE2 Direction Control bit
1 = Input
0 = Output
TRISE1: RE1 Direction Control bit
1 = Input
0 = Output
TRISE0: RE0 Direction Control bit
1 = Input
0 = Output
Legend:
R = Readable bit
- n = Value at POR
R-0
IBF
(must be cleared in software)
OBF
R-0
R/W-0
IBOV
W = Writable bit
’1’ = Bit is set
PSPMODE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-0
TRISE2
R/W-1
© 2006 Microchip Technology Inc.
x = Bit is unknown
TRISE1
R/W-1
TRISE0
R/W-1
bit 0

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